Cyrus Leung 99267c23ca [2/3] Refactor InternVL-based processors (#37324) ...

Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>

2026-03-18 22:22:19 +08:00

..

generation

[2/3] Refactor InternVL-based processors (#37324)

2026-03-18 22:22:19 +08:00

pooling

[Model] Add ColQwen3.5 4.5B support (#36887)

2026-03-17 21:17:02 +00:00

processing

[Model] Remove unused handle_oov_mm_token (#37321)

2026-03-17 19:44:52 +00:00

__init__.py

[CI/Build] Move model-specific multi-modal processing tests (#11934)

2025-01-11 13:50:05 +08:00

conftest.py

[ROCm][CI] Disable skinny GEMMs in multimodal tests to fix non-deterministic results (#35049)

2026-02-25 16:48:37 +00:00

test_mapping.py

Use Transformers v5 WeightRenaming for Transformers modeling backend (#31545)

2026-03-13 20:49:08 +00:00