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5bdd15527770ef39cc4c3cdca008fb4f9cf8a15f
vLLM
/
vllm
/
v1
/
sample
/
ops
T
History
Zhang Xiangze
7bdb42b2f2
[CPU]Avoid repeated random sample compile (
#28260
)
...
Signed-off-by: Zhang Xiangze <
Xiangze.Zhang@arm.com
>
2025-11-07 11:03:57 +00:00
..
__init__.py
[V1] Use FlashInfer Sampling Kernel for Top-P & Top-K Sampling (
#11394
)
2024-12-27 09:32:38 +09:00
bad_words.py
[V1] Logit processors for rejection sampler (
#19482
)
2025-10-07 13:02:49 -07:00
logprobs.py
Convert formatting to use
ruff
instead of
yapf
+
isort
(
#26247
)
2025-10-05 07:06:22 -07:00
penalties.py
[BugFix] Fix mixed penalties batch with async scheduling (
#27910
)
2025-11-01 10:51:24 -07:00
topk_topp_sampler.py
[CPU]Avoid repeated random sample compile (
#28260
)
2025-11-07 11:03:57 +00:00