Chaojun ZhangandJee Jee Li ec261b0291 [XPU] IPEX-optimized Punica Wrapper on XPU (#21703) ...

Signed-off-by: chzhang <chaojun.zhang@intel.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>

2025-07-28 16:43:37 +00:00

..

__init__.py

[V0 deprecation] Remove V0 HPU backend (#21131)

2025-07-17 16:37:36 -07:00

cpu.py

[CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289)

2025-07-21 09:07:08 -07:00

cuda.py

[Attention] Make CutlassMLA the default backend for SM100 (blackwell) (#21626)

2025-07-27 20:13:00 +00:00

interface.py

Fix kv_cache_dtype handling for out-of-tree HPU plugin (#21302)

2025-07-21 23:35:14 -07:00

neuron.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

rocm.py

Fix kv_cache_dtype handling for out-of-tree HPU plugin (#21302)

2025-07-21 23:35:14 -07:00

tpu.py

Fix kv_cache_dtype handling for out-of-tree HPU plugin (#21302)

2025-07-21 23:35:14 -07:00

xpu.py

[XPU] IPEX-optimized Punica Wrapper on XPU (#21703)

2025-07-28 16:43:37 +00:00