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iHore/vLLM
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73202dbe77913df9cf520bf18172ac40e0b9951f
vLLM/vllm/model_executor
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bnellnmandSage Moore 73202dbe77 [Kernel][Misc] register ops to prevent graph breaks (#6917)
Co-authored-by: Sage Moore <sage@neuralmagic.com>
2024-09-11 12:52:19 -07:00
..
guided_decoding
[Feature] OpenAI-Compatible Tools API + Streaming for Hermes & Mistral models (#5649)
2024-09-04 13:18:13 -07:00
layers
[Hardware][Intel] Support compressed-tensor W8A8 for CPU backend (#7257)
2024-09-11 09:46:46 -07:00
model_loader
[Hardware][Intel] Support compressed-tensor W8A8 for CPU backend (#7257)
2024-09-11 09:46:46 -07:00
models
[Kernel][Misc] register ops to prevent graph breaks (#6917)
2024-09-11 12:52:19 -07:00
__init__.py
[Performance] Optimize e2e overheads: Reduce python allocations (#7162)
2024-08-08 21:34:28 -07:00
custom_op.py
[XPU] fallback to native implementation for xpu custom op (#7670)
2024-08-20 00:26:09 -07:00
parameter.py
[Misc] Update GPTQ to use vLLMParameters (#7976)
2024-09-03 17:21:44 -04:00
pooling_metadata.py
[Model][Misc] Add e5-mistral-7b-instruct and Embedding API (#3734)
2024-05-11 11:30:37 -07:00
sampling_metadata.py
[Core] Optimize SPMD architecture with delta + serialization optimization (#7109)
2024-08-18 17:57:20 -07:00
utils.py
[Hardware][Neuron] Refactor neuron support (#3471)
2024-03-22 01:22:17 +00:00
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