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vLLM/vllm/lora/ops/xpu_ops
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Chaojun Zhang 13c49f9845 [xpu][lora]: Align LoRA implementation with Punica GPU: fix _apply_expand rank mismatch, add_inputs hardcode, and MoE EP (#45368)
Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
2026-07-01 22:14:04 +08:00
..
__init__.py
[XPU][8/N] Fix kernel bugs in XPU LoRA and MOE LORA (#34115)
2026-02-26 15:46:44 +08:00
lora_ops.py
[xpu][lora]: Align LoRA implementation with Punica GPU: fix _apply_expand rank mismatch, add_inputs hardcode, and MoE EP (#45368)
2026-07-01 22:14:04 +08:00
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