This website requires JavaScript.
Explore
Help
Sign In
iHore
/
vLLM
Watch
8
Star
0
Fork
0
Code
Issues
Pull Requests
Actions
2
Packages
Projects
Releases
Wiki
Activity
Files
78300cdabffbaaffe7625ed34412ec2aec75535c
vLLM
/
vllm
/
v1
/
worker
/
cpu
T
History
Li, Jiang
373592ef57
[CPU] Ship triton-cpu wheel and fix several hardcoded pin_memory=True (
#52092
)
...
Signed-off-by: jiang1.li <
jiang1.li@intel.com
>
2026-08-13 14:40:53 +08:00
..
__init__.py
[CPU] Experimentally enable Triton and MRV2 (
#43225
)
2026-05-22 01:48:17 -07:00
buffer_utils.py
[CPU] Experimentally enable Triton and MRV2 (
#43225
)
2026-05-22 01:48:17 -07:00
model_runner.py
[CPU] Experimentally enable Triton and MRV2 (
#43225
)
2026-05-22 01:48:17 -07:00
shm.py
[CPU] Ship triton-cpu wheel and fix several hardcoded pin_memory=True (
#52092
)
2026-08-13 14:40:53 +08:00