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7a100bb617471801ee1d5525bfbb8fb238a345ea
vLLM
/
vllm
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History
Yizhou
1ebff996a1
[Fix] Improve ROCm detection in WSL environments (
#38434
)
...
Signed-off-by: Yizhou Liu <
liu_yizhou@outlook.com
>
2026-08-30 04:23:10 +00:00
..
__init__.py
[Fix] Improve ROCm detection in WSL environments (
#38434
)
2026-08-30 04:23:10 +00:00
cpu.py
[CI/Build] Fix CPU platform pre-commit formatting (
#52981
)
2026-08-19 10:32:37 -07:00
cuda.py
[Bugfix] Record non-ImportError attention backend probe failures instead of crashing engine init (
#51703
)
2026-08-20 02:36:00 -07:00
interface.py
Revert "[Kernel] Gemma-4 FA4 FP8 Kernel" (
#52987
)
2026-08-19 10:48:46 -07:00
rocm.py
[Platform] Add check_runner_kv_caches_multi_layer (
#51633
)
2026-08-13 19:25:07 +00:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (
#30808
)
2026-01-07 16:07:16 +08:00
xpu.py
[Platform] Add check_runner_kv_caches_multi_layer (
#51633
)
2026-08-13 19:25:07 +00:00
zen_cpu.py
[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (
#39967
)
2026-04-18 06:22:37 +00:00