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7ea3cd7c3e9fa1db06cdf8ad1973237b061b7d64
vLLM
/
vllm
/
core
/
block
T
History
Ricky Xu
4634a89d18
Prefix Cache Aware Scheduling [1/n] (
#10128
)
...
Signed-off-by: rickyx <
rickyx@anyscale.com
>
2024-11-22 21:15:55 -08:00
..
__init__.py
[Bugfix] Add
__init__.py
files for
vllm/core/block/
and
vllm/spec_decode/
(
#3798
)
2024-04-02 12:35:31 -07:00
block_table.py
[BugFix][Core] Fix BlockManagerV2 when Encoder Input is None (
#9103
)
2024-10-07 03:52:42 +00:00
common.py
[MISC] Add prefix cache hit rate to metrics (
#7606
)
2024-08-19 11:52:07 -07:00
cpu_gpu_block_allocator.py
Prefix Cache Aware Scheduling [1/n] (
#10128
)
2024-11-22 21:15:55 -08:00
interfaces.py
Prefix Cache Aware Scheduling [1/n] (
#10128
)
2024-11-22 21:15:55 -08:00
naive_block.py
Prefix Cache Aware Scheduling [1/n] (
#10128
)
2024-11-22 21:15:55 -08:00
prefix_caching_block.py
Prefix Cache Aware Scheduling [1/n] (
#10128
)
2024-11-22 21:15:55 -08:00
utils.py
[Core] Deprecating block manager v1 and make block manager v2 default (
#8704
)
2024-10-17 11:38:15 -05:00