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7f2e78ba4df2f7091c247155fc5aeecaa73a486d
vLLM
/
vllm
/
model_executor
/
kernels
T
History
Li, Jiang
c8602c7906
[CPU] Refine CPU kernel dispatch (
#50801
)
...
Signed-off-by: jiang1.li <
jiang1.li@intel.com
>
2026-08-03 17:42:53 +08:00
..
attention
[Attention][DSA] support dcp for FLASHINFER_MLA_SPARSE (
#46076
)
2026-07-01 00:32:20 -04:00
linear
[CPU] Refine CPU kernel dispatch (
#50801
)
2026-08-03 17:42:53 +08:00
mhc
[Bugfix] Fix mHC block-M prenorm GEMM cross-row reduction carry-over (
#49429
)
2026-07-27 04:42:47 +00:00
__init__.py
[Refactor] [1/N] Reorganize kernel abstraction directory (
#34055
)
2026-02-24 06:47:22 +00:00