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808d6fd7b97f71f64a14ad4eecb9afd7b4d9dcf8
vLLM
/
vllm
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platforms
T
History
Pleaplusone
6c20e89c02
[ROCm][Deepseekv3.2] Refactor Sparse Indexer as CustomOp (
#29287
)
...
Signed-off-by: ganyi <
ygan@amd.com
>
2026-01-21 23:16:30 +08:00
..
__init__.py
[TPU] Rename path to tpu platform (
#28452
)
2025-11-11 19:16:47 +00:00
cpu.py
[1/N][Attention] Restructure attention: move files (
#31916
)
2026-01-09 13:10:24 -08:00
cuda.py
[Attention][MLA] Make FLASHINFER_MLA the default MLA backend on Blackwell, and TRTLLM the default prefill (
#32615
)
2026-01-19 18:41:34 -05:00
interface.py
[Misc] Make mem utils can be reused by other platforms (
#32322
)
2026-01-14 03:46:01 -08:00
rocm.py
[ROCm][Deepseekv3.2] Refactor Sparse Indexer as CustomOp (
#29287
)
2026-01-21 23:16:30 +08:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (
#30808
)
2026-01-07 16:07:16 +08:00
xpu.py
[1/N][Attention] Restructure attention: move files (
#31916
)
2026-01-09 13:10:24 -08:00