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iHore/vLLM
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856ec4804a4e236bdd796e0954094a532c7d19bc
vLLM/vllm/platforms
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Luka Govedič d58c42e19c [vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
2026-05-01 23:41:15 -04:00
..
__init__.py
[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)
2026-04-24 04:33:05 +00:00
cpu.py
[Feat] CPU fp8 attn for AMX/AVX-512 (#39445)
2026-04-29 20:43:21 +08:00
cuda.py
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
2026-05-01 23:41:15 -04:00
interface.py
[Attention] Abstract the MLA prefill backends and eliminate cuDNN (#32623)
2026-05-01 13:36:20 -04:00
rocm.py
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
2026-05-01 23:41:15 -04:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)
2026-01-07 16:07:16 +08:00
xpu.py
[XPU] disable fusion pattern support on XPU platform (#39789)
2026-04-23 10:07:45 +08:00
zen_cpu.py
[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)
2026-04-18 06:22:37 +00:00
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