Tianmu Liandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com> 94d3f4d205 [CPU Backend] CPU top-k and top-p sampling kernels using Triton (#43633) ...

Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

2026-05-29 15:02:39 +08:00

..

__init__.py

[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)

2026-04-24 04:33:05 +00:00

cpu.py

[CPU Backend] CPU top-k and top-p sampling kernels using Triton (#43633)

2026-05-29 15:02:39 +08:00

cuda.py

[Feat] Add support for per GPU worker RDMA NIC selection (#42083)

2026-05-28 12:45:23 -07:00

interface.py

[Feat] Add support for per GPU worker RDMA NIC selection (#42083)

2026-05-28 12:45:23 -07:00

rocm.py

[Attention][AMD] Standardize kv layout to blocks first for AMD (#43660)

2026-05-28 12:28:50 -05:00

tpu.py

[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)

2026-01-07 16:07:16 +08:00

xpu.py

[Attention] Make FlexAttention and FlashAttention use num-blocks first layouts (#42095)

2026-05-26 19:55:56 -07:00

zen_cpu.py

[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)

2026-04-18 06:22:37 +00:00