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8ccbcda5c0d460b0189f274bfbfe4947b45bd5cb
vLLM
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vllm
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History
Wuxun Zhang
e584dce52b
Add XPU MLA Sparse backend for DeepSeek v3.2 (
#33230
)
...
Signed-off-by: Zhang, Wuxun <
wuxun.zhang@intel.com
>
2026-03-11 19:19:15 +08:00
..
__init__.py
[XPU] remove common path warning log (
#33769
)
2026-02-04 16:40:17 +08:00
cpu.py
feat: add RISC-V support for CPU backend (v2) (
#36578
)
2026-03-10 21:51:39 -07:00
cuda.py
Reapply [Attention] Refactor
check_and_update_config
(
#35122
)
2026-03-09 07:17:14 -07:00
interface.py
platforms: Fix Ray DP startup crash (
#36665
)
2026-03-11 03:08:55 -07:00
rocm.py
Reapply [Attention] Refactor
check_and_update_config
(
#35122
)
2026-03-09 07:17:14 -07:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (
#30808
)
2026-01-07 16:07:16 +08:00
xpu.py
Add XPU MLA Sparse backend for DeepSeek v3.2 (
#33230
)
2026-03-11 19:19:15 +08:00