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8df14cfc8c8a09b4e57f082e59593a3abce4ffb3
vLLM/vllm/compilation/passes
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Hugo Centeno 5f8e73cb8b [Bugfix] Guard mixed-dtype allreduce RMSNorm quant fusions (#48330)
Signed-off-by: hcenteno <hugo.centeno@estudiantat.upc.edu>
2026-07-12 09:39:27 +00:00
..
fusion
[Bugfix] Guard mixed-dtype allreduce RMSNorm quant fusions (#48330)
2026-07-12 09:39:27 +00:00
ir
Preserve layout-changing clones (#44574)
2026-06-05 20:45:24 -04:00
utility
Speed up docs build (#44635)
2026-06-05 14:51:44 +00:00
__init__.py
[torch.compile] Reorganize vllm/compilation and tests/compile (0/N for vLLM IR) (#33731)
2026-02-06 04:19:49 -08:00
fx_utils.py
[torch.compile] Reorganize vllm/compilation and tests/compile (0/N for vLLM IR) (#33731)
2026-02-06 04:19:49 -08:00
inductor_pass.py
Speed up docs build (#44635)
2026-06-05 14:51:44 +00:00
pass_manager.py
[XPU] Enable sequence parallel support for XPU (#38608)
2026-06-14 19:26:46 -07:00
vllm_inductor_pass.py
[XPU][UT]Enable ut qk_norm_rope_fusion (#42486)
2026-07-01 07:38:03 +00:00
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