Li, Jiang e4d61d0d22 [CPU] Add AMX-only high-performance MLA backend for DeepSeek V2/V3/R1 (#52616) ...

Signed-off-by: jiang1.li <jiang1.li@intel.com>

2026-08-19 10:28:52 +08:00

..

__init__.py

[ROCm][CI] Select CPU platform for native no-GPU jobs (#49515)

2026-08-14 23:30:56 -07:00

cpu.py

[CPU] Add AMX-only high-performance MLA backend for DeepSeek V2/V3/R1 (#52616)

2026-08-19 10:28:52 +08:00

cuda.py

[Platform] Add check_runner_kv_caches_multi_layer (#51633)

2026-08-13 19:25:07 +00:00

interface.py

[5/N][KV-Cache Layout Refactor] Backend-published KV packing via customize_spec (#51704)

2026-08-14 09:47:55 -04:00

rocm.py

[Platform] Add check_runner_kv_caches_multi_layer (#51633)

2026-08-13 19:25:07 +00:00

tpu.py

[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)

2026-01-07 16:07:16 +08:00

xpu.py

[Platform] Add check_runner_kv_caches_multi_layer (#51633)

2026-08-13 19:25:07 +00:00

zen_cpu.py

[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)

2026-04-18 06:22:37 +00:00