Fadi ArafehandLi, Jiang <jiang1.li@intel.com> 0b25cf4419 [CPU][Perf] Enable fused kernels for GDN's gated delta rules (#43534) ...

Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>

2026-06-02 08:00:48 +00:00

..

kernels

[Perf] Optimize cutlass fp8 scaled mm bypassing padding, 20% kernel performance improvement (#43706)

2026-06-01 09:05:21 -04:00

layers

[CPU][Perf] Enable fused kernels for GDN's gated delta rules (#43534)

2026-06-02 08:00:48 +00:00

model_loader

[Bugfix] Convert Gemma4-MM ViT linear layers to vllm native impl (#43798)

2026-06-01 21:41:16 -07:00

models

[Bugfix] Convert Gemma4-MM ViT linear layers to vllm native impl (#43798)

2026-06-01 21:41:16 -07:00

offloader

[Refactor] Clean up log once scope="local" (#40540)

2026-04-22 16:42:43 -04:00

warmup

[CI failure] Temporarily disable using persistent cache for flashinfer autotune (#43119)

2026-05-19 11:44:32 -07:00

__init__.py

[Platform] Deprecate seed_everything (#31659)

2026-01-04 18:34:04 -08:00

custom_op.py

Add ability to replace oot ops when using lora (#37181)

2026-03-16 18:04:15 -07:00

parameter.py

[Quantization] add humming quantization kernel (#34556)

2026-04-24 09:29:44 -04:00

utils.py

[Bugfix][Rocm]Aiter MoE re-uses existing tensor addresses after weight update. (#40390)

2026-05-06 10:32:26 +00:00