Ma Jian eebce65756 [XPU]feat: add DeepSeek-V4 XPU attention decode path (#42953) ...

Signed-off-by: Ma Jian <jian1.ma@intel.com>

2026-06-08 13:27:12 +08:00

..

mixed_precision

[Quant] Support compressed-tensors WNA8O8Int linears and WNInt embeddings (#44340)

2026-06-04 07:40:33 -07:00

mxfp4

[XPU] [CT] Enable CT W4A4MxFp4 path and add xpu kernel (#38896)

2026-05-13 06:43:00 -07:00

mxfp8

[MXFP8] [XPU] add a new compressed tensor schema and add a xpu mxfp8 gemm kernel (#38707)

2026-04-13 16:59:20 +08:00

nvfp4

[Bugfix][CI] Add missing import of pad_nvfp4_activation_for_cutlass in flashinfer (#43237)

2026-05-20 11:59:12 -07:00

scaled_mm

[XPU]feat: add DeepSeek-V4 XPU attention decode path (#42953)

2026-06-08 13:27:12 +08:00

__init__.py

[ROCM] [FEAT] Integrate Aiter hipBLASLt GEMM online tuning (#40426)

2026-06-04 23:45:36 -07:00

base.py

[W8A8 Block Linear Refactor][2/N] Remove W8A8Fp8BlockLinearOp and adopt Fp8 block linear kernel selections. (#33892)

2026-04-09 08:50:39 +08:00

zentorch_utils.py

[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (#41813)

2026-05-30 14:17:21 -05:00