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94de871546e8da687c08ed8a7e0a26531500d4bd
vLLM
/
vllm
/
v1
/
core
/
sched
T
History
Chen Zhang
97fa8f6590
[BugFix] Avoid prefix cache hit in the same schedule step for mamba layers (
#29387
)
...
Signed-off-by: Chen Zhang <
zhangch99@outlook.com
>
2026-02-10 07:41:16 +00:00
..
__init__.py
[V1] Scheduler Refactoring [1/N] - Add Scheduler Interface (
#15250
)
2025-03-20 17:50:43 -07:00
async_scheduler.py
[Core] Don't schedule spec tokens with prefill chunks (
#33652
)
2026-02-04 23:40:22 +00:00
interface.py
Support clear mm and encoder cache (
#33452
)
2026-01-31 15:22:25 +00:00
output.py
[Feature] Add iteration level logging and enhance nvtx marker (
#31193
)
2026-01-09 00:13:39 +00:00
request_queue.py
[BugFix] scheduler: Fix ordering preserving of skipped requests (
#32173
)
2026-01-12 18:39:38 +00:00
scheduler.py
[BugFix] Avoid prefix cache hit in the same schedule step for mamba layers (
#29387
)
2026-02-10 07:41:16 +00:00
utils.py
[Scheduer] Simplify stop checking for pooling models (
#30591
)
2025-12-13 09:45:26 +00:00