vLLM/tests/tpu/lora at 998eea4a0eaceb40bb3597c0d40ce2cf729dd1fa - vLLM

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Akshat TripathiandChengji Yao c20ef40fd0 [Hardware][TPU][V1] Multi-LoRA implementation for the V1 TPU backend (#14238 )

Signed-off-by: Akshat Tripathi <akshat@krai.ai>
Signed-off-by: Chengji Yao <chengjiyao@google.com>
Co-authored-by: Chengji Yao <chengjiyao@google.com>

2025-05-07 16:28:47 -04:00

__init__.py

[Hardware][TPU][V1] Multi-LoRA implementation for the V1 TPU backend (#14238 )

2025-05-07 16:28:47 -04:00

test_lora.py

[Hardware][TPU][V1] Multi-LoRA implementation for the V1 TPU backend (#14238 )

2025-05-07 16:28:47 -04:00

test_pallas_kernels.py

[Hardware][TPU][V1] Multi-LoRA implementation for the V1 TPU backend (#14238 )

2025-05-07 16:28:47 -04:00