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9b99ccb56bc90d9f6524f0861af274ea2af02f70
vLLM/vllm/model_executor/kernels
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Juntian LiuClaude Opus 5.5Kimi CodeYifan Qiao
f8460ef236 [Kernel][DSv4.1] Bump FlashMLA to the 2026.09.30 release and its interleaved V4.1 KV cache (#61371)
Signed-off-by: juntianl <juntianl@inferact.ai>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: Kimi Code <noreply@moonshot.ai>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
2026-10-15 13:58:25 -07:00
..
attention
[Kernel][DSv4.1] Bump FlashMLA to the 2026.09.30 release and its interleaved V4.1 KV cache (#61371)
2026-10-15 13:58:25 -07:00
linear
[Bugfix][Kernel] Register int8 scaled_mm as a custom op (#57331)
2026-10-15 09:27:49 +08:00
mhc
[ROCm][DSv4.1][Perf] Run the delayed mHC seams through aiter's fused Triton kernel (#58655)
2026-09-29 10:19:10 +08:00
__init__.py
[Refactor] [1/N] Reorganize kernel abstraction directory (#34055)
2026-02-24 06:47:22 +00:00
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