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vLLM/vllm/platforms
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Li, Jiang 6458721108 [CPU] Refine default config for the CPU backend (#19539)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2025-06-13 13:27:39 +08:00
..
__init__.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
cpu.py
[CPU] Refine default config for the CPU backend (#19539)
2025-06-13 13:27:39 +08:00
cuda.py
[Bugfix][V1] Allow manual FlashAttention for Blackwell (#19492)
2025-06-12 10:40:24 +00:00
hpu.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
interface.py
Add FlexAttention to V1 (#16078)
2025-06-06 21:58:55 -07:00
neuron.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
rocm.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
tpu.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
xpu.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
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