Li, Jiang 6458721108 [CPU] Refine default config for the CPU backend (#19539) ...

Signed-off-by: jiang1.li <jiang1.li@intel.com>

2025-06-13 13:27:39 +08:00

..

__init__.py

[V1] Implement vLLM V1 [1/N] (#9289)

2024-10-22 01:24:07 -07:00

block_table.py

[Core] Use tuple for kv cache group block ids (#19175)

2025-06-10 07:01:17 +02:00

cpu_model_runner.py

[CPU] Refine default config for the CPU backend (#19539)

2025-06-13 13:27:39 +08:00

cpu_worker.py

Automatically bind CPU OMP Threads of a rank to CPU ids of a NUMA node. (#17930)

2025-06-10 06:22:05 +00:00

gpu_input_batch.py

[Core] Use tuple for kv cache group block ids (#19175)

2025-06-10 07:01:17 +02:00

gpu_model_runner.py

[V1] Resolve failed concurrent structured output requests (#19565)

2025-06-12 23:30:09 +00:00

gpu_worker.py

[V1] Reuse V0's memory_profiling util for gpu worker memory profiling (#19312)

2025-06-10 08:40:01 +08:00

lora_model_runner_mixin.py

[Misc] Add SPDX-FileCopyrightText (#19100)

2025-06-03 11:20:17 -07:00

tpu_model_runner.py

[BugFix] Fix tpu_model_runner block_id concatenation (#19228)

2025-06-06 16:28:17 -07:00

tpu_worker.py

Use xla flag to improve the quantized model performance (#19303)

2025-06-10 01:28:45 +00:00

utils.py

[V1] Support cross-layer KV sharing (#18212)

2025-06-03 20:33:07 +00:00

worker_base.py

[Misc] Add SPDX-FileCopyrightText (#19100)

2025-06-03 11:20:17 -07:00