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afc91fa0d2eb8bc050d80e9bcd74c8b1d72b4191
vLLM/vllm/model_executor/kernels/mhc
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Shanshan Shen d626108b18 [ROCm][Perf] Fuse DeepSeek-V4 mHC post/pre and RMSNorm with AITER (#52737)
Signed-off-by: shen-shanshan <467638484@qq.com>
Signed-off-by: Shanshan Shen <87969357+shen-shanshan@users.noreply.github.com>
2026-08-20 04:51:04 +00:00
..
__init__.py
[Bugfix] [ROCm] [DSV4] [Perf] Add aiter mhc support (#41946)
2026-05-13 21:43:15 +08:00
aiter.py
[ROCm][Perf] Fuse DeepSeek-V4 mHC post/pre and RMSNorm with AITER (#52737)
2026-08-20 04:51:04 +00:00
tilelang_kernels.py
[ROCm] Defer tilelang import through its import from vllm.tilelang_utils import tilelang and relaxed has_tilelang (#51159)
2026-08-13 13:12:40 -05:00
tilelang.py
[Perf] Remove redundant repeat and copy for dsv4, 1.8% E2E TPOT improvement. (#48137)
2026-07-15 00:48:10 +00:00
torch.py
[Bugfix] [ROCm] [DSV4] [Perf] Add aiter mhc support (#41946)
2026-05-13 21:43:15 +08:00
triton.py
[Bugfix] [ROCm] [DSV4] [Perf] Add aiter mhc support (#41946)
2026-05-13 21:43:15 +08:00
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