43 lines
1.6 KiB
Python
43 lines
1.6 KiB
Python
# SPDX-License-Identifier: Apache-2.0
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# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
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"""HY V4 (``hy_v4``) model — hardware-isolated entry point.
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HY V4 combines three architectural pieces:
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- **iHC** (independent Hyper-Connections): the single residual stream is
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replaced by ``hc_mult`` parallel residual channels, gated per sub-block.
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- **MLA + lightning indexer**: multi-head latent attention with an optional
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DSA-style sparse top-k selection, plus an output gate and a learnable sink.
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- **MoE**: sigmoid-routed experts with a clamped SwiGLU and shared experts.
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The package is organized like `vllm.models.deepseek_v32`: this module is the
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only public entry point and dispatches on the current platform, so registry
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entries never reach into a platform subpackage.
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NVIDIA and ROCm are supported, the latter through `amd/`. The port also drops
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the reference implementation's HPC/TPCP fusion paths, which depend on
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infrastructure that does not exist in this tree.
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"""
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from typing import TYPE_CHECKING
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from vllm.platforms import current_platform
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if current_platform.is_xpu():
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raise NotImplementedError("hy_v4 does not yet support XPU.")
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# The NVIDIA branch is the static default that type-checkers see; the ROCm
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# branch overrides it at runtime (kept type-compatible via type: ignore).
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if TYPE_CHECKING or not current_platform.is_rocm():
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from .nvidia.model import HYV4ForCausalLM
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else:
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from .amd.model import HYV4ForCausalLM # type: ignore[assignment]
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# The draft head has no ROCm-specific implementation yet.
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from .nvidia.mtp import HYV4MTP # noqa: E402
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__all__ = [
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"HYV4ForCausalLM",
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"HYV4MTP",
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]
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