3 people bc03f280c8 [XPU] keep generator state of sycl kernel align with pytorch (#41771) ...

Signed-off-by: Yan Ma <yan.ma@intel.com>
Co-authored-by: Qiming Zhang <qiming1.zhang@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

2026-05-12 11:44:47 +00:00

..

logits_processor

[Reasoning] Support for speculative decoding with thinking budget (#34668)

2026-04-29 06:14:52 +00:00

ops

[XPU] keep generator state of sycl kernel align with pytorch (#41771)

2026-05-12 11:44:47 +00:00

__init__.py

[V1] Implement vLLM V1 [1/N] (#9289)

2024-10-22 01:24:07 -07:00

metadata.py

[Reasoning] Support for speculative decoding with thinking budget (#34668)

2026-04-29 06:14:52 +00:00

rejection_sampler.py

[Reasoning] Support for speculative decoding with thinking budget (#34668)

2026-04-29 06:14:52 +00:00

sampler.py

[Perf][1/n] Eliminate various GPU<->CPU syncs (#41429)

2026-05-11 20:36:03 +00:00

thinking_budget_state.py

[Reasoning] Support for speculative decoding with thinking budget (#34668)

2026-04-29 06:14:52 +00:00