Logo
Explore Help
Sign In
iHore/vLLM
Watch 8
Star 0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity
Files
ceade1952c7aebfbf328daa7dd40877c5cd8e8a5
vLLM/vllm/engine
T
History
Vibhav AgarwalXinyu ChenMichael Goin
f4b42df048 [Attention Backend] TurboQuant: 2-bit KV cache compression with 4x capacity (#38479)
Signed-off-by: vibhavagarwal5 <vibhavagarwal5@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Xinyu Chen <xinyu1.chen@intel.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
2026-04-14 19:57:13 -07:00
..
__init__.py
Change the name to vLLM (#150)
2023-06-17 03:07:40 -07:00
arg_utils.py
[Attention Backend] TurboQuant: 2-bit KV cache compression with 4x capacity (#38479)
2026-04-14 19:57:13 -07:00
async_llm_engine.py
[Docs] Reduce time spent generating API docs (#34255)
2026-02-11 02:56:02 -08:00
llm_engine.py
[Docs] Reduce time spent generating API docs (#34255)
2026-02-11 02:56:02 -08:00
protocol.py
[Frontend][4/n] Improve pooling entrypoints | pooling. (#39153)
2026-04-09 10:09:45 +00:00
Powered by Gitea Version: 1.27.2 Page: 451ms Template: 6ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API