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iHore/vLLM
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d00dd65cd4dbc1ebbdbe2cd070ff694e9e9321a2
vLLM/vllm/platforms
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Cyrus Leung 6aa8f9a4e7 [Core] Rework dtype resolution (#18751)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
2025-06-01 11:04:23 +08:00
..
__init__.py
[Misc] Reduce logs on startup (#18649)
2025-05-24 23:03:53 -07:00
cpu.py
[Core] Rework dtype resolution (#18751)
2025-06-01 11:04:23 +08:00
cuda.py
[Core] Enable CUDA graphs for DP + All2All kernels (#18724)
2025-05-28 22:55:30 +00:00
hpu.py
[Hardware] correct method signatures for HPU,ROCm,XPU (#18551)
2025-05-22 22:31:59 -07:00
interface.py
[Platform][Dist] Make torch distributed process group extendable (#18763)
2025-05-28 10:52:34 +00:00
neuron.py
[Neuron] Add multi-LoRA support for Neuron. (#18284)
2025-05-29 16:41:22 +08:00
rocm.py
[ROCm][Kernel] Add gfx950 support for skinny gemms (#18010)
2025-05-31 07:40:05 -07:00
tpu.py
[Platform] Move platform check to right place (#18470)
2025-05-22 12:11:28 -07:00
xpu.py
[Hardware] correct method signatures for HPU,ROCm,XPU (#18551)
2025-05-22 22:31:59 -07:00
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