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d8f483dc30a9a74b8fdf1c6dcb11cff503fe40a3
vLLM/vllm/model_executor
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Igor MargulisCursormgoin
d8f483dc30 [Spec Decode] Fix hidden-state extraction block size for hybrid verifiers (#46301)
Signed-off-by: Igor Margulis <igor.margulis@intel.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
2026-06-30 08:19:51 -07:00
..
kernels
[CPU][RISC-V] Add RVV path for W4A8 INT4 GEMM (#45269)
2026-06-25 08:18:10 +00:00
layers
[Bugfix][Quant] Raise actionable error instead of bare assert for group-size/TP mismatch (#46230) (#46236)
2026-06-30 14:57:14 +00:00
model_loader
Remove more unnecessary load_weights methods (#47058)
2026-06-30 15:22:16 +01:00
models
[Spec Decode] Fix hidden-state extraction block size for hybrid verifiers (#46301)
2026-06-30 08:19:51 -07:00
offloader
[Refactor] Clean up log once scope="local" (#40540)
2026-04-22 16:42:43 -04:00
warmup
[Perf][1/N] Expand Triton kernel warmup coverage, DSv4 (#46634)
2026-06-29 16:40:34 +00:00
__init__.py
[Platform] Deprecate seed_everything (#31659)
2026-01-04 18:34:04 -08:00
custom_op.py
Add ability to replace oot ops when using lora (#37181)
2026-03-16 18:04:15 -07:00
parameter.py
Speed up docs build (#44635)
2026-06-05 14:51:44 +00:00
utils.py
Remove more unnecessary load_weights methods (#47058)
2026-06-30 15:22:16 +01:00
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