Isotr0pyandCyrus Leung d927dbcd88 [Model] Refactor Ultravox to use merged input processor (#11198) ...

Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>

2024-12-16 10:09:53 +00:00

..

guided_decoding

[Core] Update outlines and increase its threadpool size (#11140)

2024-12-14 07:46:18 +00:00

layers

[[Misc]Upgrade bitsandbytes to the latest version 0.45.0 (#11201)

2024-12-15 03:03:06 +00:00

model_loader

[Misc] Split up pooling tasks (#10820)

2024-12-11 01:28:00 -08:00

models

[Model] Refactor Ultravox to use merged input processor (#11198)

2024-12-16 10:09:53 +00:00

__init__.py

[Performance] Optimize e2e overheads: Reduce python allocations (#7162)

2024-08-08 21:34:28 -07:00

custom_op.py

[misc] move functions to config.py (#10624)

2024-11-25 09:27:30 +00:00

parameter.py

[Kernel] (2/N) Machete - Integrate into CompressedTensorsWNA16 and GPTQMarlin (#7701)

2024-09-23 13:46:26 -04:00

pooling_metadata.py

[Model][Misc] Add e5-mistral-7b-instruct and Embedding API (#3734)

2024-05-11 11:30:37 -07:00

sampling_metadata.py

[Misc] typo find in sampling_metadata.py (#10740)

2024-11-29 05:17:57 +00:00

utils.py

[Hardware] using current_platform.seed_everything (#9785)

2024-10-29 14:47:44 +00:00