Yan MaandKunshang Ji 02564b4de0 [XPU]fallback to TRITON_ATTN for vit attn on xpu when use float32 dtype (#43759) ...

Signed-off-by: Yan Ma <yan.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

2026-06-03 03:20:21 -07:00

..

__init__.py

[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)

2026-04-24 04:33:05 +00:00

cpu.py

[CPU Backend] CPU top-k and top-p sampling kernels using Triton (#43633)

2026-05-29 15:02:39 +08:00

cuda.py

[Feat] Add support for per GPU worker RDMA NIC selection (#42083)

2026-05-28 12:45:23 -07:00

interface.py

[Platform] Add is_cumem_allocator_available (#43838)

2026-06-03 10:54:50 +08:00

rocm.py

[Kernel][ROCm] Native W4A16 kernel for AMD RDNA3 (gfx1100) — fp16 + bf16 (#41394)

2026-05-29 11:04:40 +00:00

tpu.py

[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)

2026-01-07 16:07:16 +08:00

xpu.py

[XPU]fallback to TRITON_ATTN for vit attn on xpu when use float32 dtype (#43759)

2026-06-03 03:20:21 -07:00

zen_cpu.py

[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)

2026-04-18 06:22:37 +00:00