Mikko TukiainenandCursor 81c993658e [ROCm][Perf] Fuse main QK-norm/RoPE/gate and KV-cache write into the AMD QSA prepare launch (#59732) ...

Signed-off-by: Mikko Tukiainen <Mikko.Tukiainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>

2026-10-09 21:14:49 +08:00

..

__init__.py

[Model] Support Qwen3.8-Flash-Next (#53896)

2026-08-31 05:57:56 +00:00

test_config.py

[Model] Use upstream GLM-5.3 and Qwen4-Exp configs and processor (#57387)

2026-10-02 02:25:18 +00:00

test_hc_ops.py

[Perf][Qwen4Exp] Fuse HC down projection and SiLU on NVIDIA (#58957)

2026-09-28 18:51:38 +08:00

test_ple.py

[ROCm][Qwen4Exp] Use fused PLE Triton kernels on the AMD backend (#60021)

2026-10-08 15:47:56 +00:00

test_qsa_amd.py

[ROCm][Perf] Fuse main QK-norm/RoPE/gate and KV-cache write into the AMD QSA prepare launch (#59732)

2026-10-09 21:14:49 +08:00

test_qsa_prepare_amd.py

[ROCm][Perf] Fuse main QK-norm/RoPE/gate and KV-cache write into the AMD QSA prepare launch (#59732)

2026-10-09 21:14:49 +08:00

test_qsa_prepare.py

[Perf][Qwen4Exp] Merge QSA QKVG and indexer QK projections (#59533)

2026-10-05 07:03:29 +00:00

test_qsa_reference.py

[Bugfix] Keep the GLM-5.3 kpool tail and Qwen4 QSA ring out of the null block (#59528)

2026-10-08 20:44:04 +00:00