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vLLM/vllm/platforms
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Fadi ArafehandVadim Gimpelson 51f22dcfd0 [Feat][CPU] Enable Gated DeltaNet Attention (Qwen 3.5 / 3.6) (#41025)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
2026-05-07 12:57:09 +08:00
..
__init__.py
[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)
2026-04-24 04:33:05 +00:00
cpu.py
[Feat][CPU] Enable Gated DeltaNet Attention (Qwen 3.5 / 3.6) (#41025)
2026-05-07 12:57:09 +08:00
cuda.py
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
2026-05-01 23:41:15 -04:00
interface.py
[Feature] TurboQuant: support hybrid models and uniform quantization (#39931)
2026-05-04 20:14:01 -04:00
rocm.py
[New Model][ROCm] Add AMD support for DeepSeek V4 (#40871)
2026-05-05 08:55:37 -07:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)
2026-01-07 16:07:16 +08:00
xpu.py
[XPU] disable fusion pattern support on XPU platform (#39789)
2026-04-23 10:07:45 +08:00
zen_cpu.py
[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)
2026-04-18 06:22:37 +00:00
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