Zhengxu ChenandCyrus Leung ad9d656bfa [multimodal][test] Reduce memory utilization for test_siglip to avoid OOM (#29504) ...

Signed-off-by: zhxchen17 <zhxchen17@fb.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>

2025-12-01 20:41:48 +08:00

..

generation

[CI] Skip paddleocr_vl for transformer 4.57.3 (#29758)

2025-12-01 04:38:06 +00:00

pooling

[multimodal][test] Reduce memory utilization for test_siglip to avoid OOM (#29504)

2025-12-01 20:41:48 +08:00

processing

[Misc] Refactor tokenizer interface (#29693)

2025-11-29 04:02:21 -08:00

__init__.py

[CI/Build] Move model-specific multi-modal processing tests (#11934)

2025-01-11 13:50:05 +08:00

test_mapping.py

Default model load/config/tokenizer to mistral format if relevant files exist (#28659)

2025-11-21 13:58:59 -08:00