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f91fb2fcf3f100d46baf4db2e5d86fa5596b276b
vLLM/vllm/model_executor/kernels/linear
T
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com> 985c97a6a8 [Perf] Optimize cutlass fp8 scaled mm bypassing padding, 20% kernel performance improvement (#43706)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-06-01 09:05:21 -04:00
..
mixed_precision
[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (#41813)
2026-05-30 14:17:21 -05:00
mxfp4
[XPU] [CT] Enable CT W4A4MxFp4 path and add xpu kernel (#38896)
2026-05-13 06:43:00 -07:00
mxfp8
[MXFP8] [XPU] add a new compressed tensor schema and add a xpu mxfp8 gemm kernel (#38707)
2026-04-13 16:59:20 +08:00
nvfp4
[Bugfix][CI] Add missing import of pad_nvfp4_activation_for_cutlass in flashinfer (#43237)
2026-05-20 11:59:12 -07:00
scaled_mm
[Perf] Optimize cutlass fp8 scaled mm bypassing padding, 20% kernel performance improvement (#43706)
2026-06-01 09:05:21 -04:00
__init__.py
[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (#41813)
2026-05-30 14:17:21 -05:00
base.py
[W8A8 Block Linear Refactor][2/N] Remove W8A8Fp8BlockLinearOp and adopt Fp8 block linear kernel selections. (#33892)
2026-04-09 08:50:39 +08:00
zentorch_utils.py
[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (#41813)
2026-05-30 14:17:21 -05:00
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