Logo
Explore Help
Sign In
iHore/vLLM
Watch 8
Star 0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity
Files
fab07e4d0f7f266643c6ac0dc944f9f433ef2140
vLLM/cmake
T
History
lyd1992andClaude f351455f0f [CPU][RISC-V] Add RVV-optimized attention kernels for RISC-V Vector Extension (#40119)
Signed-off-by: liuyudong <liuyudong@iscas.ac.cn>
Co-authored-by: Claude <noreply@anthropic.com>
2026-05-15 12:08:23 +08:00
..
external_projects
[Attention] Sync FA with upstream (#41052)
2026-05-12 23:34:18 -04:00
cpu_extension.cmake
[CPU][RISC-V] Add RVV-optimized attention kernels for RISC-V Vector Extension (#40119)
2026-05-15 12:08:23 +08:00
hipify.py
Convert formatting to use ruff instead of yapf + isort (#26247)
2025-10-05 07:06:22 -07:00
utils.cmake
[NVIDIA] Fix DGX Spark logic (#38126)
2026-03-27 15:26:07 -07:00
Powered by Gitea Version: 1.27.2 Page: 203ms Template: 5ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API