Agata DobrzyniewiczandClaude Opus 4.8 a82f1b388f [Perf][V1] Skip LRU hash-split in free_blocks when prefix caching is off (#48017) ...

Signed-off-by: Dobrzyniewicz, Agata <agata.dobrzyniewicz@intel.com>
Signed-off-by: Agata Dobrzyniewicz <160237065+adobrzyn@users.noreply.github.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>

2026-07-25 09:06:20 +00:00

..

sched

Encoder cache extension hooks (#48218)

2026-07-24 02:52:00 -07:00

__init__.py

[V1] Implement vLLM V1 [1/N] (#9289)

2024-10-22 01:24:07 -07:00

block_pool.py

[Perf][V1] Skip LRU hash-split in free_blocks when prefix caching is off (#48017)

2026-07-25 09:06:20 +00:00

encoder_cache_manager.py

Encoder cache extension hooks (#48218)

2026-07-24 02:52:00 -07:00

kv_cache_coordinator.py

[BugFix] Handle per-group prefix-hit divergence for hybrid models with KV connector (#48425)

2026-07-22 17:19:11 -07:00

kv_cache_manager.py

[BugFix] Handle per-group prefix-hit divergence for hybrid models with KV connector (#48425)

2026-07-22 17:19:11 -07:00

kv_cache_metrics.py

[Core][Observability] Add KV cache residency metrics (#27793)

2025-12-01 18:27:53 +00:00

kv_cache_utils.py

[Bugfix][KV cache] Support sparse-MLA targets with SWA drafts (#48776)

2026-07-23 11:30:50 -07:00

single_type_kv_cache_manager.py

[Core] Add MRV2 virtual-batch PCP for MLA (#46570)

2026-07-19 02:53:15 +00:00