Ma Jian 70db1488c5 [DSV4][XPU] Add MHC fused_post_pre support (#44144) ...

Signed-off-by: Ma Jian <jian1.ma@intel.com>

2026-06-09 17:23:17 +08:00

..

kernels

[Bugfix] Canonicalize FP8 weight layout to (K, N) at the source (#44735)

2026-06-08 14:37:36 -06:00

layers

[DSV4][XPU] Add MHC fused_post_pre support (#44144)

2026-06-09 17:23:17 +08:00

model_loader

[MoE Refactor] FusedMoE/MoERunner inversion refactor (#41184)

2026-06-08 10:42:58 -04:00

models

[Bugfix][MiniCPM-o] Fix cuda/cpu device mismatch in Resampler2_5 pos_embed (#43844)

2026-06-08 23:28:26 -07:00

offloader

[Refactor] Clean up log once scope="local" (#40540)

2026-04-22 16:42:43 -04:00

warmup

[MoE Refactor] FusedMoE/MoERunner inversion refactor (#41184)

2026-06-08 10:42:58 -04:00

__init__.py

[Platform] Deprecate seed_everything (#31659)

2026-01-04 18:34:04 -08:00

custom_op.py

Add ability to replace oot ops when using lora (#37181)

2026-03-16 18:04:15 -07:00

parameter.py

Speed up docs build (#44635)

2026-06-05 14:51:44 +00:00

utils.py

[Bugfix][Rocm]Aiter MoE re-uses existing tensor addresses after weight update. (#40390)

2026-05-06 10:32:26 +00:00