[CPU] Added faster exp routine for lower precision data types. (#38112)
Signed-off-by: Anna Mayne <anna.mayne@arm.com> Co-authored-by: Fadi Arafeh <fadi.arafeh@arm.com> Co-authored-by: Li, Jiang <jiang1.li@intel.com>
This commit is contained in:
co-authored by
Fadi Arafeh
Li, Jiang <jiang1.li@intel.com>
parent
2196bac135
commit
2f314bc5e6
@@ -61,8 +61,23 @@
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#endif
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#ifdef __aarch64__
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// Implementation copied from Arm Optimized Routines (expf AdvSIMD)
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// Implementation of neon_expf copied from Arm Optimized Routines (expf
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// AdvSIMD)
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// https://github.com/ARM-software/optimized-routines/blob/master/math/aarch64/advsimd/expf.c
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//
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// Additional fast exponential intended for cases where outputs will be
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// downcasted to FP16 / BF16 (e.g. attention softmax). Accurate within 1 ULP
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// for FP16 Accurate within 1 ULP for BF16 for inputs in [-87.683, 88.376] &
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// clamps inputs outside this range to 0 / inf. Implementation is similar to
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// exp_u20, but:
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// - uses a third degree polynomial approximation for exp(r) instead of a
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// fifth degree one, with coefficients re-tuned.
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// - does not split natural log (ln) into high / low parts
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// - clamps exp(x) to 0 for x < -87.683113f and inf for x > 88.3762589f
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// exp(x) = 2^n (exp(r))
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// r = x - n*ln2, with n = round(x/ln2)
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// exp(r) ~ poly(r) = 1 + r + r^2 * (c3 + c2 * r)
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// n = round(x / ln2), r = x - n*ln2
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#include <limits>
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#define DEFINE_FAST_EXP \
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const float32x4_t inv_ln2 = vdupq_n_f32(0x1.715476p+0f); \
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@@ -106,7 +121,38 @@
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result.val[2] = neon_expf(vec.reg.val[2]); \
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result.val[3] = neon_expf(vec.reg.val[3]); \
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return vec_op::FP32Vec16(result); \
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};
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}; \
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const float32x4_t lower_bound = vdupq_n_f32(-0x1.5ebb82p+6f); \
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const float32x4_t upper_bound = vdupq_n_f32(0x1.61814ap+6f); \
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constexpr float ln2 = 0x1.62e43p-1f; \
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constexpr float f_c2 = 0x1.5592ecp-3f; \
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const float32x4_t f_c3 = vdupq_n_f32(0x1.017d34p-1f); \
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auto neon_expf_f16 = [&](float32x4_t values) __attribute__(( \
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always_inline)) { \
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const uint32x4_t lt_lower = vcltq_f32(values, lower_bound); \
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const uint32x4_t gt_upper = vcgtq_f32(values, upper_bound); \
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float32x4_t n = vrndaq_f32(vmulq_f32(values, inv_ln2)); \
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float32x4_t r = vfmsq_n_f32(values, n, ln2); \
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uint32x4_t e = vshlq_n_u32(vreinterpretq_u32_s32(vcvtq_s32_f32(n)), 23); \
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float32x4_t r2 = vmulq_f32(r, r); \
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float32x4_t q = vfmaq_n_f32(f_c3, r, f_c2); \
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float32x4_t s = vaddq_f32(vdupq_n_f32(1.0f), r); \
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float32x4_t p = vfmaq_f32(s, q, r2); \
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float32x4_t y = \
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vreinterpretq_f32_u32(vaddq_u32(vreinterpretq_u32_f32(p), e)); \
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y = vbslq_f32(lt_lower, vdupq_n_f32(0.0f), y); \
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y = vbslq_f32(gt_upper, vdupq_n_f32(INFINITY), y); \
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return y; \
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}; \
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auto fast_exp_f16 = [&](const vec_op::FP32Vec16& vec) \
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__attribute__((always_inline)) { \
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float32x4x4_t result; \
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result.val[0] = neon_expf_f16(vec.reg.val[0]); \
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result.val[1] = neon_expf_f16(vec.reg.val[1]); \
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result.val[2] = neon_expf_f16(vec.reg.val[2]); \
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result.val[3] = neon_expf_f16(vec.reg.val[3]); \
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return vec_op::FP32Vec16(result); \
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};
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#endif // __aarch64__
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@@ -1152,7 +1152,11 @@ class AttentionMainLoop {
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bool use_sink) {
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#ifdef DEFINE_FAST_EXP
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DEFINE_FAST_EXP
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bool constexpr IsReducedPrecision =
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std::is_same_v<query_t, c10::BFloat16> ||
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std::is_same_v<query_t, c10::Half>;
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#endif
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using prob_buffer_vec_t = typename VecTypeTrait<prob_buffer_t>::vec_t;
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static_assert(sizeof(prob_buffer_t) <= sizeof(logits_buffer_t));
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@@ -1201,8 +1205,17 @@ class AttentionMainLoop {
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vec = vec - max_vec;
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// compute exp
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#ifdef DEFINE_FAST_EXP
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vec = fast_exp(vec);
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#if defined(DEFINE_FAST_EXP)
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#ifdef __aarch64__
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if constexpr (IsReducedPrecision) {
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vec = fast_exp_f16(vec);
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} else
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#endif
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{
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vec = fast_exp(vec);
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}
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prob_buffer_vec_t output_vec(vec);
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output_vec.save(curr_prob_buffer_iter);
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#else
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@@ -1258,7 +1271,11 @@ class AttentionMainLoop {
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int32_t kv_tile_token_num, float softcap_scale) {
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#ifdef DEFINE_FAST_EXP
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DEFINE_FAST_EXP
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bool constexpr IsReducedPrecision =
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std::is_same_v<query_t, c10::BFloat16> ||
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std::is_same_v<query_t, c10::Half>;
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#endif
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float inv_softcap_scale = 1.0 / softcap_scale;
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vec_op::FP32Vec16 softcap_scale_vec(softcap_scale);
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vec_op::FP32Vec16 inv_softcap_scale_vec(inv_softcap_scale);
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@@ -1272,8 +1289,15 @@ class AttentionMainLoop {
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vec_op::FP32Vec16 vec(curr_logits_buffer_iter);
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vec = vec * inv_softcap_scale_vec;
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#ifdef DEFINE_FAST_EXP
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vec = fast_exp(vec);
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#if defined(DEFINE_FAST_EXP)
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#ifdef __aarch64__
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if constexpr (IsReducedPrecision) {
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vec = fast_exp_f16(vec);
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} else
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#endif
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{
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vec = fast_exp(vec);
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}
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vec_op::FP32Vec16 inv_vec = ones_vec / vec;
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vec = (vec - inv_vec) / (vec + inv_vec);
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#else
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