[Quant] Enable modelopt_mixed on Turing (SM75) (#45375)

Signed-off-by: Mike G <180722391+mikekg@users.noreply.github.com>
This commit is contained in:
Mike G
2026-06-22 19:30:49 -07:00
committed by GitHub
parent 8db12169a4
commit 56e5797511
3 changed files with 15 additions and 9 deletions
+1 -1
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@@ -160,7 +160,7 @@ Priority is **1 = highest** (tried first).
| Backend | Version | Dtypes | KV Dtypes | Block Sizes | Head Sizes | Sink | Non-Causal | MM Prefix | DCP | Attention Types | Compute Cap. |
| ------- | ------- | ------ | --------- | ----------- | ---------- | ---- | ---------- | --------- | --- | --------------- | ------------ |
| `CPU_ATTN` | | fp16, bf16, fp32 | `auto`, `fp8`, `fp8_e4m3`, `fp8_e5m2` | %16 | 32, 64, 80, 96, 112, 128, 160, 192, 224, 256, 512 | ❌ | ❌ | ❌ | ❌ | All | N/A |
| `FLASHINFER` | Native† | fp16, bf16 | `auto`, `float16`, `bfloat16`, `fp8`, `fp8_e4m3`, `fp8_e5m2` | 16, 32, 64, 128, 256, 512, 1024 | 64, 128, 256, 512 | ❌ | ✅ | ❌ | ✅ | Decoder | 7.x-9.x |
| `FLASHINFER` | Native† | fp16, bf16 | `auto`, `float16`, `bfloat16`, `fp8`, `fp8_e4m3`, `fp8_e5m2` | 16, 32, 64, 128, 256, 512, 1024 | 64, 128, 256, 512 | ❌ | ✅ | ❌ | ✅ | Decoder | 8.x-9.x |
| `FLASHINFER` | TRTLLM† | fp16, bf16 | `auto`, `float16`, `bfloat16`, `fp8`, `fp8_e4m3`, `fp8_e5m2`, `nvfp4` | 16, 32, 64, 128, 256, 512, 1024 | 64, 128, 256, 512 | ✅ | ✅ | ❌ | ✅ | Decoder | 10.x |
| `FLASH_ATTN` | FA2* | fp16, bf16 | `auto`, `float16`, `bfloat16` | %16 | Any | ❌ | ✅ | ❌ | ✅ | All | ≥8.0 |
| `FLASH_ATTN` | FA3* | fp16, bf16 | `auto`, `float16`, `bfloat16`, `fp8`, `fp8_e4m3`, `fp8_e5m2` | %16 | Any | ✅ | ✅ | ❌ | ✅ | All | 9.x |
@@ -2299,13 +2299,14 @@ class ModelOptMixedPrecisionConfig(ModelOptQuantConfigBase):
@classmethod
def get_min_capability(cls) -> int:
# Ampere (SM80/SM86): NVFP4 routed experts run via Marlin W4A16, and FP8
# weight-only dense layers run via MarlinFP8 (W8A16, compute in
# bf16/fp16). FP8 MoE, if present, also routes to Marlin because
# TritonExperts gates its FP8 schemes behind supports_fp8() (cc>=89).
# None of these paths require native FP8 tensor cores, so SM80 is
# sufficient.
return 80
# Turing and up (SM75+): NVFP4 routed experts run via Marlin W4A16
# (SM75+), FP8 weight-only dense via MarlinFP8 (cc>=7.5), and FP8 MoE,
# if present, via Marlin (TritonExperts gates its FP8 schemes behind
# supports_fp8(), cc>=89). None of these paths require native FP8 tensor
# cores, so SM75 is sufficient. Validated end-to-end on a Tesla T4
# (SM75) and A100 (SM80). Pairs with the FlashInfer attention SM80
# lower bound so SM75 auto-selects a supported attention backend.
return 75
@classmethod
def override_quantization_method(
+6 -1
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@@ -424,7 +424,12 @@ class FlashInferBackend(AttentionBackend):
@classmethod
def supports_compute_capability(cls, capability: DeviceCapability) -> bool:
return capability >= DeviceCapability(7, 5) and capability <= DeviceCapability(
# FlashInfer supports SM75+, but is currently broken on SM75 (Turing):
# https://github.com/flashinfer-ai/flashinfer/issues/3620 (fix:
# https://github.com/flashinfer-ai/flashinfer/pull/3621). Temporarily
# raise the floor to SM80 so it is not auto-selected on SM75 until
# that fix lands; revert to DeviceCapability(7, 5) once it does.
return capability >= DeviceCapability(8, 0) and capability <= DeviceCapability(
12, 1
)