[XPU][DeepSeekV4]Add DeepSeek-V4 fuse_index_q SYCL kernel path (#45991)
Signed-off-by: Avery Miao <avery.miao@intel.com> Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
This commit is contained in:
co-authored by
Kunshang Ji
parent
f890e1dbe2
commit
c67650f04b
@@ -375,6 +375,115 @@ def _topk_topp_sample_fake(
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return
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def _xpu_deepseek_fused_indexer_q_rope_fp8_impl(
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index_q: torch.Tensor,
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positions: torch.Tensor,
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index_q_cos_sin_cache: torch.Tensor,
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index_weights: torch.Tensor,
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index_weights_softmax_scale: float,
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index_weights_head_scale: float,
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index_q_fp8: torch.Tensor,
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index_weights_out: torch.Tensor,
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) -> None:
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"""Fused RoPE + FP8 quant of the DeepSeek-V4 sparse-indexer Q (XPU).
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Writes ``index_q_fp8`` and ``index_weights_out`` in place (no return).
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Requires head_dim=128, rope_dim=64, and num_heads divisible by 2.
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Args:
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index_q: (T, H, 128) bfloat16 Q before RoPE. Contiguous.
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positions: (T,) int64 absolute token positions.
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index_q_cos_sin_cache: (max_pos, 64) float32 RoPE cos/sin cache.
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index_weights: (T, H) bfloat16 raw indexer weights.
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index_weights_softmax_scale: scalar softmax scale.
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index_weights_head_scale: scalar per-head scale.
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index_q_fp8: (T, H, 128) fp8 (e4m3) output, preallocated. [written]
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index_weights_out: (T, H) float32 output, preallocated;
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= index_weights * q_scale * softmax_scale * head_scale (the
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per-(token, head) q_scale is folded in here). [written]
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"""
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torch.ops._xpu_C.deepseek_fused_indexer_q_rope_fp8(
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index_q,
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positions,
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index_q_cos_sin_cache,
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index_weights,
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index_weights_softmax_scale,
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index_weights_head_scale,
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index_q_fp8,
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index_weights_out,
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)
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def _xpu_deepseek_fused_indexer_q_rope_fp8_fake(
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index_q: torch.Tensor,
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positions: torch.Tensor,
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index_q_cos_sin_cache: torch.Tensor,
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index_weights: torch.Tensor,
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index_weights_softmax_scale: float,
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index_weights_head_scale: float,
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index_q_fp8: torch.Tensor,
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index_weights_out: torch.Tensor,
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) -> None:
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return
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def _xpu_deepseek_fused_indexer_q_rope_mxfp4_impl(
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index_q: torch.Tensor,
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positions: torch.Tensor,
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index_q_cos_sin_cache: torch.Tensor,
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index_weights: torch.Tensor,
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index_weights_softmax_scale: float,
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index_weights_head_scale: float,
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index_q_packed: torch.Tensor,
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index_q_scale: torch.Tensor,
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index_weights_out: torch.Tensor,
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) -> None:
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"""Fused RoPE + MXFP4 quant of the DeepSeek-V4 sparse-indexer Q (XPU).
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Writes ``index_q_packed``, ``index_q_scale`` and ``index_weights_out`` in
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place (no return). Requires head_dim=128, rope_dim=64, and num_heads
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divisible by 4.
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Args:
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index_q: (T, H, 128) bfloat16 Q before RoPE. Contiguous.
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positions: (T,) int64 absolute token positions.
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index_q_cos_sin_cache: (max_pos, 64) float32 RoPE cos/sin cache.
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index_weights: (T, H) bfloat16 raw indexer weights.
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index_weights_softmax_scale: scalar softmax scale.
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index_weights_head_scale: scalar per-head scale.
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index_q_packed: (T, H, 64) uint8 packed E2M1 nibbles (2 per byte),
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preallocated. [written]
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index_q_scale: (T, H, 4) uint8 ue8m0 per-block (32-elem) scales,
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preallocated. [written]
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index_weights_out: (T, H) float32 output, preallocated;
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= index_weights * softmax_scale * head_scale (no q_scale folded;
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per-block scales live in index_q_scale). [written]
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"""
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torch.ops._xpu_C.deepseek_fused_indexer_q_rope_mxfp4(
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index_q,
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positions,
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index_q_cos_sin_cache,
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index_weights,
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index_weights_softmax_scale,
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index_weights_head_scale,
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index_q_packed,
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index_q_scale,
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index_weights_out,
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)
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def _xpu_deepseek_fused_indexer_q_rope_mxfp4_fake(
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index_q: torch.Tensor,
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positions: torch.Tensor,
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index_q_cos_sin_cache: torch.Tensor,
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index_weights: torch.Tensor,
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index_weights_softmax_scale: float,
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index_weights_head_scale: float,
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index_q_packed: torch.Tensor,
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index_q_scale: torch.Tensor,
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index_weights_out: torch.Tensor,
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) -> None:
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return
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def _xpu_mxfp8_quantize_impl(
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x: torch.Tensor, dtype: torch.dtype | None = None
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) -> tuple[torch.Tensor, torch.Tensor]:
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@@ -1141,6 +1250,24 @@ class xpu_ops:
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fake_impl=_topk_topp_sample_fake,
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)
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direct_register_custom_op(
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op_name="xpu_deepseek_fused_indexer_q_rope_fp8",
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op_func=_xpu_deepseek_fused_indexer_q_rope_fp8_impl,
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mutates_args=["index_q_fp8", "index_weights_out"],
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fake_impl=_xpu_deepseek_fused_indexer_q_rope_fp8_fake,
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)
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direct_register_custom_op(
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op_name="xpu_deepseek_fused_indexer_q_rope_mxfp4",
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op_func=_xpu_deepseek_fused_indexer_q_rope_mxfp4_impl,
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mutates_args=[
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"index_q_packed",
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"index_q_scale",
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"index_weights_out",
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],
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fake_impl=_xpu_deepseek_fused_indexer_q_rope_mxfp4_fake,
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)
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_OPS_REGISTERED = True
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@@ -367,6 +367,18 @@ def fused_indexer_q_rope_quant(
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index_q_scale,
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index_weights_out,
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)
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elif current_platform.is_xpu():
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torch.ops.vllm.xpu_deepseek_fused_indexer_q_rope_mxfp4(
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index_q,
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positions,
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index_q_cos_sin_cache,
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index_weights,
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index_weights_softmax_scale,
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index_weights_head_scale,
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index_q_packed,
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index_q_scale,
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index_weights_out,
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)
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else:
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_fused_indexer_q_rope_mxfp4_kernel[(num_tokens, num_index_q_heads)](
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positions,
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@@ -423,6 +435,17 @@ def fused_indexer_q_rope_quant(
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index_q_fp8,
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index_weights_out,
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)
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elif current_platform.is_xpu():
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torch.ops.vllm.xpu_deepseek_fused_indexer_q_rope_fp8(
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index_q,
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positions,
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index_q_cos_sin_cache,
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index_weights,
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index_weights_softmax_scale,
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index_weights_head_scale,
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index_q_fp8,
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index_weights_out,
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)
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else:
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_fused_indexer_q_rope_quant_kernel[(num_tokens, num_index_q_heads)](
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positions,
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