51 Commits
Author SHA1 Message Date
liuzhenweiandKunshang Ji 4e964b2623 [XPU] Fix Event init failure w/ external (#61743)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-10-17 19:10:39 +08:00
liuzhenweiandKunshang Ji bfa7e5b7af [XPU][CI] Enable XPU graph in graph tests (#60784)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-10-12 10:39:40 +08:00
liuzhenweiandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com> ff440c7805 [BreakableCG] Add eager break for Mamba-family ops (#57881)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-10-10 14:06:57 +08:00
liuzhenweiandKunshang Ji 0004536dd0 [XPU][Graph] Replace boolean-mask assignment with torch.where (#60529)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-10-08 17:13:48 +08:00
liuzhenwei 89772ddb1f [CI][XPU] Skip CUDA-IPC weight sync metrics test on Intel (#59556)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-10-02 01:28:58 +00:00
liuzhenwei 6945d142e5 [XPU] Use encoder-only model runner for EC producer instances (#59320)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-30 13:43:21 +08:00
liuzhenwei dcfc17e0b1 [XPU] enable XPU GRAPH by default (#51600)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-24 19:17:25 +08:00
liuzhenweiandKunshang Ji 6654bcbfca [MRV2][XPU] use xpu sample kernel in mrv2 sampler (#57277)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-09-21 13:24:41 +08:00
liuzhenweiandKunshang Ji a15dbbd63d [XPU][CI] fallback to 7-args of moe_align_block_size (#57855)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-09-21 13:15:29 +08:00
liuzhenwei a08dffe215 [XPU][CI] update gpt-oss package version (#56783)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-15 10:23:14 +08:00
liuzhenwei fe49665eb3 [XPU][CI] update test requirements (#56704)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-14 02:01:50 +00:00
liuzhenwei de500290ff [XPU][CI] fix jit_warmup_triton_launcher (#56670)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-13 21:44:24 +08:00
liuzhenwei 2f59050eda [XPU][CI] Skip ROCm test on non-ROCm platforms (#56555)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-12 21:26:55 +08:00
liuzhenwei a0844fa6c6 [XPU][CI] skip DeepSeek-V4.1-Flash in test_tensor_schema.py (#56463)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-09-12 09:24:30 +08:00
liuzhenwei f25c580af1 [XPU][Dockerfile] Update UCX install (#53817)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-08-27 04:34:03 +00:00
liuzhenwei a27e88c862 [XPU][CI] increase timeout of extract_hidden_states tp2 (#53862) 2026-08-26 15:57:36 -07:00
liuzhenwei b1d9337e92 [EPD] Allow KV consumers to omit MM embeddings (#52697)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-08-19 02:16:08 +00:00
liuzhenweiandKunshang Ji d648236199 [XPU][CI] Fix ExampleConnector KV cache device selection (#51806)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-11 23:40:29 +08:00
liuzhenwei bd6536071c [XPU][Test] Pin block size in test_multi_connector (#51213)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-08-10 21:57:45 +08:00
liuzhenweiandKunshang Ji 8c0f029ac7 [XPU] update warning of XPU Graph (#50236)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-06 06:33:33 +00:00
liuzhenwei 2a0323b4e0 [XPU][Test] Support MultiConnector accuracy testing on XPU (#51160)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-08-06 13:49:48 +08:00
liuzhenwei d54b58cc48 [Hardware] Use torch.accelerator.empty_host_cache() for host cache cl… (#51107)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-08-06 10:27:57 +08:00
liuzhenwei e7f6a39db8 [Test] Make EPD correctness tests configurable for XPU (#50110)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-29 07:47:48 +08:00
liuzhenwei afc94523c9 [XPU][CI] Use platform device in InputBatch V2 test (#49939)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-27 15:28:02 +08:00
liuzhenwei b153ae6089 [XPU][CI] add heterogeneous TP UT (#49651)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-26 02:01:15 +00:00
liuzhenwei 318b527cc2 [XPU] add warning for xpu graph limitations (#49419)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-25 02:26:15 +00:00
liuzhenweiandKunshang Ji 6a1acac3fe [BUGFIX] Fix log capture in KV test (#49655)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-07-25 00:36:53 +00:00
liuzhenwei 06da482fb4 [XPU] WA of topk_softmax arg mismatch on XPU (#49395)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-22 01:05:01 -07:00
liuzhenwei 8502958810 [XPU] support HND layout (#47975)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-17 10:54:34 +00:00
liuzhenwei d5b1ec2684 [XPU] allow forcing flash attn for mm_prefix (#48828)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-17 09:44:18 +00:00
liuzhenwei b93cbd7416 [XPU] Fix topk_sigmoid arg mismatch on XPU (#47858)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-07 16:53:18 +00:00
liuzhenwei bdaf27519f [XPU] Fix Event init failure w/ blocking (#47868)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-07 22:54:03 +08:00
liuzhenwei 736f1a5907 [XPU] Route mm_prefix models to Triton attention backend (#47688)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-07-06 16:52:44 +08:00
liuzhenwei 7a341fa109 [XPU] Support ZE_AFFINITY_MASK passthrough in xpu_disagg_acc_test (#47105)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-06-30 17:06:12 +00:00
liuzhenwei 09cdcf34aa [XPU] update nixl to v1.2.0 (#46327)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-06-22 20:55:06 +08:00
liuzhenwei 435f82d61a [Bugfix] Fix Llama4ForCausalLM initialization test failure (#46341)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-06-22 08:40:43 +00:00
liuzhenweiandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com> a331589394 [XPU] Update nixl to v0.10.1 in Dockerfile (#40287)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-06-18 14:01:26 +08:00
liuzhenwei 2959a9273a [XPU][CI] add model runner v2 into CI (#44650)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-06-18 00:28:34 +00:00
liuzhenwei b8bd773fe4 [XPU] Fix Triton attn fp8/bf16 check failing (#45758)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-06-16 12:31:20 +08:00
liuzhenweiandKunshang Ji 8af550b399 [BUGFIX][XPU] Update fa interface for compatibility (#45394)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-06-12 11:45:01 +00:00
liuzhenweiandKunshang Ji 3f3e2702c2 [XPU] Enable rms_norm/act quant fusions (#43963)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-06-02 16:14:41 +00:00
liuzhenwei ff712f6447 [MRV2][XPU] add Model Runner V2 log (#42710)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-05-17 04:15:50 +00:00
liuzhenwei b26558d4a3 [CI][XPU] skip ut of offload connector (#42598)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-05-14 13:13:53 +08:00
liuzhenwei 07a40ede19 [UT][XPU] fix test_parallel_sampling due to global random state (#42388)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-05-12 18:03:23 +08:00
liuzhenweiandKunshang Ji 8517cdaf90 [XPU] update dp rank w/o env-var isolation (#39856)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-05-12 14:49:54 +08:00
liuzhenwei f2bbd575e2 [CI][XPU] Skip fork-dependent logits processor test (#42013)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-05-08 06:10:19 -07:00
liuzhenwei 4a79262e0f [UT][Hardware] let torchrun example tests use the default backend (#39879)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
2026-04-23 16:22:28 +08:00
83aea2147f [XPU][UT] update UTs in CI (#39296)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Signed-off-by: Kunshang Ji <jikunshang95@gmail.com>
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: Kunshang Ji <jikunshang95@gmail.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-04-09 09:38:16 +08:00
liuzhenwei 0812d8dd41 [Hardware][Gaudi][BugFix] fix arguments of hpu fused moe (#15945)
Signed-off-by: zhenwei <zhenweiliu@habana.ai>
2025-04-04 09:38:55 -07:00
liuzhenwei 5eeadc2642 [Hardware][Gaudi][Feature] Enable Dynamic MoE for Mixtral (#12303)
Signed-off-by: zhenwei <zhenweiliu@habana.ai>
2025-03-24 09:48:40 -07:00
liuzhenwei 8ae5ff2009 [Hardware][Gaudi][BugFix] Fix dataclass error due to triton package update (#12338)
Signed-off-by: zhenwei <zhenweiliu@habana.ai>
2025-01-23 08:35:46 +00:00