11 Commits
Author SHA1 Message Date
91ed2859c7 [CPU][Zen] Update zentorch to 2.14.0.1 & enable float16 on Venice and later (#61411)
Signed-off-by: Ganesh R <ganesh.r@amd.com>
Co-authored-by: Kevin H. Luu <khluu000@gmail.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
2026-10-15 00:23:50 -07:00
Ganesh RandCyrus Leung 47232f3c7f [Bugfix][CI] Fix renderers tests broken by tool name removal from warn logs (#61652)
Signed-off-by: Ganesh R <ganesh.r@amd.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
2026-10-14 18:14:58 +00:00
5addde2a0a [CPU][Zen] Pass f32 weight scales to the zentorch INT8 MoE (#59434)
Signed-off-by: Ganesh R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
2026-10-01 15:51:53 +08:00
Ganesh RCursormergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
e12291d733 [CPU][Zen] Add DA8W4 (W4A8) int4 support for dense and MoE layers (#54024)
Signed-off-by: R <Ganesh.R@amd.com>
Signed-off-by: Ganesh R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-10-01 15:18:25 +08:00
Ganesh RCursorLi, Jiang <jiang1.li@intel.com>
f34a0e0797 [CPU] Gate the AVX10.2 paths on compiler support (#58133)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
2026-09-24 18:07:53 +08:00
Ganesh RandCursor 82731931ae [Bugfix][CPU] Fall back to CpuPlatform when zentorch fails to import (#54923)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-09-16 17:15:12 +08:00
a5f6f61a8a [CI][CPU] Add speculative-decoding coverage to CPU CI (#54934)
Signed-off-by: R <Ganesh.R@amd.com>
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: jiang1.li <jiang1.li@intel.com>
2026-09-14 19:51:38 +08:00
Ganesh RCursormergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
8f03625b3d [CPU][Zen] Route Int8 MoE inference through zentorch on AMD (#44834)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 09:31:31 +00:00
Ganesh RCursorLi, Jiang <jiang1.li@intel.com>
f27ae25473 [Bugfix][CPU] Take an attention group's query head count from its layers (#51852)
Signed-off-by: Ganesh R <Ganesh.R@amd.com>
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
2026-08-17 18:45:59 +08:00
Ganesh RCursorLi, Jiang <jiang1.li@intel.com>
ec40f6a8a6 [CPU] Fix torch.compile crash from torch.accelerator.synchronize on CPU-only hosts (#49960)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
2026-08-03 19:48:48 +08:00
Ganesh R 445a2a4d1a feat(cpu): add CPU support for draft model speculative decoding (#32662)
Signed-off-by: R <Ganesh.R@amd.com>
2026-04-10 11:49:52 +08:00