Commit Graph
6092 Commits
Author SHA1 Message Date
Zhaodong BingTJianZhaodong BingCursormergify[bot] <37929162+mergify[bot]@users.noreply.github.com>Zhaodong Bing
5d09eb2cf3 [Bugfix][MoE] Preserve unquantized weight storage on ROCm (#46009)
Signed-off-by: bingzhaodong <aaab8b@gmail.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: Zhaodong Bing <zhaobing@smc300x-ccs-aus-gpuf2c5.prov.aus.ccs.cpe.ice.amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Zhaodong Bing <zhaobing@smc300x-ccs-aus-gpuf2a0.prov.aus.ccs.cpe.ice.amd.com>
2026-09-03 11:06:09 +08:00
Kevin H. LuuandKimi Code 6c6376a09e [CI] Remove deleted nvidia/Nemotron-3-Nano-Omni-30B-A3B-Reasoning-BF16 and its arch aliases (#55026)
Signed-off-by: khluu <khluu000@gmail.com>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
2026-09-02 15:18:46 -07:00
a0d3e5c16e [XPU] Add fused GemmaRMSNorm path for eager execution (#53678)
Signed-off-by: Huanxing <huanxing.shen@intel.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-09-03 06:11:20 +08:00
Isotr0py 1356635d83 [New model][Multimodal] Add DeepSeek-V4-Flash-Vision-Exp support (#54566)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
2026-09-02 11:09:09 -07:00
Harry MellorandClaude Opus 5 d539de1c5d [Docs] Add missing return annotations flagged by griffe (#54980)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-02 09:56:07 -07:00
Hung Hoang (黄兴)andCyrus Leung 3b45d053b4 [Bugfix][Model] Fix CohereASR streaming audio-token estimate (unit + subsampling) (#53829)
Signed-off-by: hungh <hungh@nvidia.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
2026-09-02 08:55:16 -07:00
Tomasz Zielinskimergify[bot] <37929162+mergify[bot]@users.noreply.github.com>Claude Opus 5Harry Mellor
ffe3bb3c72 [Hardware][XPU] Register matmul and linear batch-invariant kernels for XPU (#49209)
Signed-off-by: tzielinski-habana <tomasz.zielinski@intel.com>
Signed-off-by: Tomasz Zielinski <85164140+tzielinski-habana@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
2026-09-02 13:31:38 +00:00
fxmarty-amd 7894394b07 [Online quantization] Add targeted online quantization configuration based on user patterns (#51285) 2026-09-02 08:55:15 -04:00
jackLeiandOpenAI Codex 584e8f0dda [Model] Fix GLM-OCR MTP weight loading (#49869)
Signed-off-by: jackLei0901 <42642542+jackLei0901@users.noreply.github.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-02 08:38:36 +00:00
Gabriel WuandKimi Code 396c5a5632 [Bugfix] Lazy-import FlashInfer PCIe IPC all-reduce in kernel_warmup (#54869)
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
2026-09-02 04:31:03 +00:00
ee3c00bbf4 [Performance] Register Triton W4A16 GEMM as a custom op (#51453)
Signed-off-by: giuseppegrossi <ggrossi@amd.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-09-01 22:55:34 -05:00
Nick Hillandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com> a566ea7e8f [Perf] Avoid more h2d copies from non-pinned tensors (#54660)
Signed-off-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 20:37:09 -07:00
Yongye ZhuandOpenAI Codex 3ba9907a1d [Kimi-K3] Overlap low-M TP8 KDA projections (#54697)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-02 03:35:28 +00:00
Divakar VermaandAndreas Karatzas dbf1a044ea [Bugfix] Fix ColQwen3.5 pooler projector initialization (#54847)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-09-02 10:35:43 +08:00
Thien Tran 003e34341a [Qwen3.8-Flash-Next] Separate prefill and decode paths for QSA indexer (#54513)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
2026-09-02 09:08:10 +08:00
mingg26andOpenAI Codex 259a209bfa [Kimi-K3][Perf] Prefetch ll_bf16 router weights for M=1 (#53524)
Signed-off-by: ming <ming@inferact.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-01 21:40:19 +00:00
Micah Williamson ce6a283c09 [Bugfix] Restore weight_dtype in QuarkW8A8Fp8MoEMethod to fix GPT-OSS FP8 MoE weight loading (#54824)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
2026-09-01 16:08:11 -05:00
7a977c0699 [ModelOpt] Redesign the LinearMethod classes using the generic QuantKey-driven method (#49381)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
2026-09-01 16:28:56 -04:00
stefankoncarevic 73723b707f [ROCm][MoE] Fix gfx950 block scale swizzle for AITER Triton MXFP4 W4A16 (#54773)
Signed-off-by: Stefan Koncarevic <Stefan.Koncarevic@amd.com>
2026-09-01 19:48:45 +00:00
Julien Debache ab54f5bd83 [Chore] Remove redundant _pack_topk_ids_weights_kernel in TrtLLM NvFP4 MoE (#46872)
Signed-off-by: jdebache <jdebache@nvidia.com>
2026-09-01 15:30:11 -04:00
Wentao Ye 6c58595c2d [Feature] Avoid flashinfer autotune each time when vllm source change (#54794)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
2026-09-01 15:03:30 -04:00
2fe5cef35e [Fix] Fix FSE compatibility detection for Quark-produced models (#54573)
Signed-off-by: xuebwang-amd <xuebwang@amd.com>
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: xuebwang-amd <xuebwang@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-09-01 12:12:20 -05:00
Harry MellorandClaude Opus 5 f1e5fdd7f2 [Transformers backend] Replace vocab embeddings in recursive_replace (#54760)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-09-01 15:35:24 +00:00
Misha GoinandOpenAI Codex 82b7d49a6e [MoE] Generalize masked activation for padded layouts (#51217)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-01 11:34:13 -04:00
Taneem Ibrahim 76f3249fbd [Mypy] Fix typing for M models (#54262)
Signed-off-by: Taneem Ibrahim <taneem.ibrahim@gmail.com>
2026-09-01 11:26:00 -04:00
Andrii SkliarandAndrii Skliar adebc41b7e [Mamba] Add FlashInfer ReplaySSM backend (#52506)
Signed-off-by: Andrii Skliar <askliar@nvidia.com>
Signed-off-by: Andrii Skliar <andreyws96@gmail.com>
Co-authored-by: Andrii Skliar <askliar@nvidia.com>
2026-09-01 10:26:43 -04:00
Priyansh Jain 55aa766dc8 [Bugfix][Model] Fix GraniteMoeHybrid per-expert quantized weight loading (#54052) 2026-09-01 12:38:53 +00:00
Liang LvKunshang Jimergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
92ccd2c306 [Bugifx][INC] Fix INC quantization method selection for non-quantized layers (#47237)
Signed-off-by: lvliang-intel <liang1.lv@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 10:40:47 +00:00
Ganesh RCursormergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
8f03625b3d [CPU][Zen] Route Int8 MoE inference through zentorch on AMD (#44834)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 09:31:31 +00:00
Subhash Polisetti 4707679cd2 [Bugfix][MiniCPM-V] Route video_embeds to the shared vision parser (#54633)
Signed-off-by: subhash polisetti <subhashr161347@gmail.com>
2026-09-01 09:16:07 +00:00
fxmarty-amdandAndreas Karatzas 63988f3c2d [Quantization][Refactor][1/N] Adopt QuantKey in QuarkConfig and methods, relying on weight_quant_key, act_quant_key for quant method dispatch (#52958)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-09-01 02:55:54 -05:00
sychen52 7c5dc571cb [Attention][DSA] Enable W4A16 DSA (#51724)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
2026-09-01 12:37:47 +08:00
afriedriandAndreas Karatzas dc9114b201 [ROCm][MoE] Split AITER CK and Triton MXFP4 W4A16 into separate backends (#50622)
Signed-off-by: afriedri <afriedri@amd.com>
Signed-off-by: Andy Friedrich <afriedri@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-08-31 23:14:14 -05:00
Gabriel WuYongye Zhumergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
446c769482 [Distributed] Add opt-in FlashInfer PCIe IPC all-reduce backend (#53576)
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 03:34:56 +00:00
Roberto L. CastroandCodex e16b5e518d [1/N][warmup][DSv4] Migrate generic MLA metadata and indexing kernels (#50175)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
2026-08-31 23:26:05 -04:00
Lain 882ca8d696 [Kernel] add Flashinfer cutedsl w4a16 linear (#53014)
Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
2026-09-01 02:49:14 +00:00
4c21d41733 [XPU] Route activation CustomOps to SYCL kernels (#53734)
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-09-01 09:19:52 +08:00
Zihan ZhangandClaude Opus 5 d61b6e1878 [Bugfix][Spec Decode] Take the DFlash draft's RoPE layout from its own config (#54373)
Signed-off-by: SubSir <tiancaizhangdaxian@sjtu.edu.cn>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
2026-08-31 18:13:20 -04:00
Roberto L. CastroCodexmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
f5c3cc240b [Perf][Kernel] Tune cooperative topk for medium batch-sizes (#53382)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-08-31 13:44:38 -07:00
Juhi MittalandClaude Opus 5 85c1365bd9 [Bugfix] NemotronHMTP: add hf_to_vllm_mapper so quant exclusions reach the MTP draft (#53790)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-08-31 12:10:24 -07:00
Zhenzhong XuandKunshang Ji bd575a0d0b [AutoRound] Support AutoRound Format Block-Wise FP8 in vLLM (#47434)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-31 22:56:20 +08:00
Jee Jee Li e2c8eeac40 [kernel] Fused embedding kernel (#53677)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
2026-08-31 11:34:14 +00:00
Andreas Karatzas 399247cc88 [Bugfix][MM] Fix MiniCPM-o image processor reuse on Transformers v5 (#54501)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
2026-08-31 17:07:52 +08:00
jl9876andKunshang Ji 1b9539d37c [Quantization][Autoround][XPU] Support AutoRound MXFP8 MoE models (#51248)
Signed-off-by: jl9876 <jia.li@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-31 16:37:01 +08:00
zofiaandopencode 2a61f060d3 [XPU] Ensure unquantized linear weight is N-contiguous (#53536)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Co-authored-by: opencode <noreply@opencode.ai>
2026-08-31 16:01:24 +08:00
Li, Jiang fdbf2ddbd2 [Bugfix][CPU] Fix several bugs (#54042)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2026-08-31 15:33:06 +08:00
Jee Jee Li 8e92248f79 [Kernel] Retire the DSv3 router GEMM CUDA kernel (#54040)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
2026-08-31 07:15:31 +00:00
Prudhvi Vuda 7292ee2791 [Bugfix][Multimodal] Honor modality-scoped mm_processor_kwargs (#53808)
Signed-off-by: Prudhvivuda <prudhvi12042001@gmail.com>
2026-08-31 06:37:12 +00:00
+5 e126687a9a [Model] Support Qwen3.8-Flash-Next (#53896)
Signed-off-by: huanghaoyan.hhy <huanghaoyan.hhy@alibaba-inc.com>
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: lishunyang12 <lishunyang03@gmail.com>
Signed-off-by: Harry Huang <huanghaoyan.hhy@alibaba-inc.com>
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Yifan Qiao <yifanqiao@inferact.ai>
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: KungYork <firelikest@163.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
Co-authored-by: andyluo7 <43718156+andyluo7@users.noreply.github.com>
Co-authored-by: Isotr0py <mozf@inferact.ai>
Co-authored-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: lishunyang12 <lishunyang03@gmail.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-08-31 05:57:56 +00:00
LironKesem 44fe2a392b [CPU] add CPU support for Voxtral (#53921)
Signed-off-by: Liron Kesem <52330564+LironKesem@users.noreply.github.com>
2026-08-31 04:20:37 +00:00