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38cc054fc2
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[Perf][Kernel] Vectorized flat abs-max for dynamic per-tensor FP8 quantization (#58194)
Signed-off-by: Monishver Chandrasekaran <monishverchandrasekaran@gmail.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
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2026-09-25 09:19:48 -06:00 |
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chuan932andMisha Goin
|
f550ad8bf7
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[Kernel][Perf] Register-resident path for per-token-group 8-bit quant (#55330)
Signed-off-by: chao.huan <chao.huan@nio.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
|
2026-09-25 08:11:42 -07:00 |
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Yongye ZhuandSummer Yang
|
442bd00d9f
|
[Perf][Distributed] Add low-SM multimem reduce-scatter for SM100/SM103 (#55072)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Summer Yang <girasoleyang@gmail.com>
Co-authored-by: Summer Yang <girasoleyang@gmail.com>
|
2026-09-25 03:27:21 +00:00 |
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f34a0e0797
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[CPU] Gate the AVX10.2 paths on compiler support (#58133)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-24 18:07:53 +08:00 |
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Ankit-Jaiswal-AMDandDouglas Lehr
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88afb9dcac
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[CPU] Adds support for fp32 attention sinks (#56252)
Signed-off-by: Ankit Jaiswal <ankit.jaiswal@amd.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
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2026-09-23 08:55:09 -05:00 |
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Gabriel WuandKimi Code
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c843f0cab7
|
[Bugfix][SM120][MLA] Support NoPE sparse MLA (GLM-5.3-Flash) on the FlashInfer SM120 backend (#55277)
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
|
2026-09-23 02:03:20 -07:00 |
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Misha Goin
|
25965ee583
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[Kernel] Remove AllSpark INT8 W8A16 GEMM backend (#58001)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-22 14:07:34 -07:00 |
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Gilles TurpinandWentao Ye
|
74370a0e30
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[Bugfix] hadacore_transform: respect inplace parameter to fix garbage outputs with QuIP transforms (#43462)
Signed-off-by: Gilles Turpin <turpingilles15@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
|
2026-09-22 12:48:20 -04:00 |
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Woosuk KwonandCodex
|
9a70c233cd
|
[Perf][DSV4.1] Fuse TP all-reduce with mHC input preparation (#57643)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-20 20:28:06 -07:00 |
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Wentao Ye
|
4868312128
|
[Refactor] Remove dead kernel code (#57621)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2026-09-20 10:39:23 -07:00 |
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7d99c2c4fd
|
[Feature][Humming] Humming feature integration (#56685)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
|
2026-09-20 08:11:01 -07:00 |
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92b40f5a14
|
[CPU][Perf] refactor paged attention for Arm CPUs (#56045)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
|
2026-09-20 12:25:13 +08:00 |
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a7fda4c88b
|
[Bugfix] Fix SM100 fp8_ds_mla cache scales (#49435)
Signed-off-by: Ariel Bereslavsky <arielb@getimpala.ai>
Signed-off-by: Ariel Bereslavsky <ariel@getimpala.ai>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Ariel Bereslavsky <arielb@getimpala.ai>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-09-19 17:15:07 -07:00 |
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Yuwen ZhouandLi, Jiang <jiang1.li@intel.com>
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b346479065
|
[CPU] Add CPU FP8 W8A8 linear/MoE support (#49942)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
|
2026-09-18 17:59:42 +08:00 |
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Thien TranandCodex
|
8da75d6190
|
C3x SM100 FP8 blockwise - Pad activation scales to multiple of 4 (#57377)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Codex <noreply@openai.com>
|
2026-09-18 08:39:27 +00:00 |
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117cf43fb6
|
[HARDWARE][POWER] Enable W8A8 INT8 MoE on POWER (#55316)
Signed-off-by: Rukhaiya <bibirukhaiya123@gmail.com>
Signed-off-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Antigravity <antigravity@google.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
|
2026-09-17 21:45:13 +08:00 |
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Wentao Ye
|
91a4c40b45
|
[Compile] Fix compile warning #177-D (#56609)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2026-09-17 05:04:56 -07:00 |
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Harry MellorandClaude Opus 5
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8c1557a79c
|
Add pydocstyle to the ruff rules (#52136)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: Harry Mellor <hej.mellor@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 16:44:29 +00:00 |
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d6a1677d55
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[Model][DSv4.1] FlashMLA mega attention and the NVFP4 compressed KV cache (#56935)
Signed-off-by: Yongye Zhu <yongye@inferact.ai>
Signed-off-by: 云挚 <ningyunxiao.nyx@antgroup.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Yongye Zhu <yongye@inferact.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Yunxiao Ning <73625538+foraxe@users.noreply.github.com>
Co-authored-by: AI Assistant <noreply@openai.com>
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2026-09-16 03:07:50 -07:00 |
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6ecd97f1b7
|
[Perf][DSpark] Add KV-only context insertion across V4.1 cache formats (#56441)
Signed-off-by: 0z5a <0z5a@users.noreply.github.com>
Signed-off-by: Yongye Zhu <yongye@inferact.ai>
Co-authored-by: 0z5a <0z5a@users.noreply.github.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-15 21:34:55 -07:00 |
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Misha GoinandOpenAI Codex
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c6fa1f05d1
|
[Perf][Kernel] Add sampled filtering for persistent top-k (#56346)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-15 14:15:59 -07:00 |
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Fangzhou Ai
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dffbb714e4
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[ROCm][Perf] Optimize DSV4.1 K=512 decode top-k on gfx950 (#56743)
Signed-off-by: fai <fangzhouai@gmail.com>
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2026-09-15 18:34:24 +00:00 |
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e6eb0d120c
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[Model][DSv4.1] Store the whole KV in MXFP8 (FlashMLA V4.1 record) (#56893)
Signed-off-by: Yongye Zhu <yongye@inferact.ai>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Yongye Zhu <yongye@inferact.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-14 20:12:55 -07:00 |
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sychen52
|
7702ee87db
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[Bugfix][DSA] Write nvfp4_ds_mla from the fused norm+rope kernel (#55538)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
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2026-09-15 00:25:33 +04:00 |
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Matthias Gehre
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dc2e8f1157
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[ROCm][Perf] W4A16: keep skinny GEMM zero-points packed 4-bit (#54965)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
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2026-09-14 17:40:25 +08:00 |
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Ayushman SinghandAyushman Singh
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c2ea9f1a5f
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[Kernel][Perf][Quantization] Fix odd-row performance cliff in per-token-group quantization (#56478)
Signed-off-by: Ayushman Singh <ayush1399@users.noreply.github.com>
Co-authored-by: Ayushman Singh <ayush1399@users.noreply.github.com>
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2026-09-12 20:27:08 -07:00 |
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29332cf936
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[4/N] Expose HiSparse cache metrics via KV connector stats (#56061)
Signed-off-by: NickLucche <nicolo.lucchesi@mistral.ai>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-09-12 10:47:55 -07:00 |
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d43bb2f37f
|
[3/N] HiSparse: host-resident sparse-MLA decode hot-buffering (#53781)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: Matthew Bonanni <matthew@neuralmagic.com>
Signed-off-by: Nicolò Lucchesi <nicolo.lucchesi@mistral.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: Nicolò Lucchesi <nicolo.lucchesi@mistral.ai>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
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2026-09-12 00:36:47 -04:00 |
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Misha Goin
|
8a7f98c8c3
|
[Kernel][MoE] Optimize batched_moe_align_block_size with cooperative writes (#53280)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-11 12:05:22 -07:00 |
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Wentao Ye
|
1e1060f998
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[Kimi Perf] Group fp8 mla cahche insertion, 4~6x kernel level performance improvement for small batch (#55356)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-09-11 08:16:57 -07:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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e3f755b732
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[CPU] Speedup LM Head on Arm CPUs (#55352)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-11 16:21:14 +08:00 |
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MattandClaude Opus 5
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9163190dda
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[ROCm][Bugfix][Perf] Tune multi-stream shared experts use; wvSplitKrc fixes (#56098)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-10 15:14:22 -07:00 |
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|
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9521c60bdc
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[ROCm][Perf] Kimi-K3 Fused kernels for KDA prefill reland (#54038)
Signed-off-by: kliuae <kuanfu.liu@embeddedllm.com>
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Signed-off-by: kliuae <17350011+kliuae@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-09-10 15:37:54 +08:00 |
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Yongye ZhuandClaude Opus 5
|
be1cb9834b
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[Kernel] Optional Q-norm in fused DSv4 MLA epilogue; group_size=32 for packed FP8 quant (#56215)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-10 00:35:59 -07:00 |
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Li, Jiang
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c3ccc0e957
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[Model] Add DeepSeek-V4 CPU backend (#55355)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-09-10 14:14:48 +08:00 |
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Roderick Wuandmgoin
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2c9d68f80b
|
[Quant][Kernel] Remove GPTQ Group/Dynamic Activation Ordering (#54809)
Signed-off-by: Roderick-Wu <roderickwu2003@gmail.com>
Signed-off-by: Roderick Wu <roderickwu2003@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-08 12:45:12 -07:00 |
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aoshen02
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755541443f
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[Bugfix][ROCm] Mask paged attention V cache padding (#53856)
Signed-off-by: aoshen02 <aoshen@inferact.ai>
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2026-09-08 14:39:23 +08:00 |
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Jee Jee LiandYongye Zhu
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9c297e3b8b
|
[Kernel] PDL enablement for fusedQKNormRopeKernel (#55755)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-09-07 20:49:03 -07:00 |
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Jiangyun Zhu
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f43ef1531d
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[CI] fix pre-commit (#55630)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
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2026-09-06 20:54:22 -07:00 |
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Jürgen Schmied
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4df80187b5
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[Kernel] SM 12.x blockwise FP8: swizzle the CTA raster when the weight exceeds the L2 (#55180)
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2026-09-06 17:36:59 -07:00 |
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zhao, zhenhui
|
1c344ed41e
|
[CPU] [Feat] Add native AMX-FP8 attention impl for Diamond Rapids (#49410)
Signed-off-by: zhejiangxiaomai <zhenhui.zhao@intel.com>
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2026-09-06 11:06:56 +08:00 |
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lucamotzandLuca Motz
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bc96d76aa9
|
[Kernel] Fall back from persistent top-k on low-shared-memory GPUs (#54110)
Signed-off-by: Luca Motz <321921718+lucamotz@users.noreply.github.com>
Signed-off-by: Luca Motz <luca.motz@icloud.com>
Co-authored-by: Luca Motz <321921718+lucamotz@users.noreply.github.com>
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2026-09-05 08:58:37 -04:00 |
|
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Li, Jiang
|
8340fe1bb9
|
[CI/Build] Fix flaky failures in CPU CI image building (#55317)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-09-04 20:27:02 +08:00 |
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Yongye ZhuandClaude Fable 5
|
9509fc8ae6
|
[Perf][Kimi-K3] Cut MLA decode concat/cache epilogue latency (#54896)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-09-03 15:39:58 -07:00 |
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Jiangyun Zhu
|
98ed0856f3
|
[Model] add GLM-5.3-Flash support (#53906)
|
2026-09-03 09:40:35 -07:00 |
|
|
Wentao Ye
|
a56654d6de
|
[K3 Perf] Enable DSV3 GEMM for inner-contiguous and row-strided tensors, 12%~81% kernel performance improvement (#54565)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-09-02 12:22:40 -07:00 |
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Isotr0py
|
1356635d83
|
[New model][Multimodal] Add DeepSeek-V4-Flash-Vision-Exp support (#54566)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
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2026-09-02 11:09:09 -07:00 |
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|
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46c8a161f4
|
[Bugfix] Handle padded routes in CUTLASS MoE permutations (#54747)
Signed-off-by: Kevin Luu <51931015+khluu@users.noreply.github.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-09-01 19:08:17 -07:00 |
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514c7314a0
|
[Perf][Kernel] Initialize NVFP4 padding in quant kernel (#53568)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-01 09:49:07 -07:00 |
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Misha GoinandOpenAI Codex
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82b7d49a6e
|
[MoE] Generalize masked activation for padded layouts (#51217)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-09-01 11:34:13 -04:00 |
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