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f1899b2ffdf87598350c416a074c8c291c845902
vLLM
/
vllm
/
models
/
deepseek_v4
/
common
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ops
T
History
Wentao Ye
837eae6458
[DSv4 Perf] Remove redundant full kernel for dsv4, 1.88x kernel performance improvement (
#50298
)
...
Signed-off-by: yewentao256 <
zhyanwentao@126.com
>
2026-07-30 11:39:07 -04:00
..
__init__.py
[New model] Kimi K3 (
#50000
)
2026-07-30 03:49:58 -07:00
cache_utils.py
[DSv4 Perf] Remove redundant full kernel for dsv4, 1.88x kernel performance improvement (
#50298
)
2026-07-30 11:39:07 -04:00
fused_compress_quant_cache.py
[ROCm][Perf] DSv4 two-stage compressor kernel for HCA prefill (
#47718
)
2026-07-15 23:31:51 +00:00
fused_indexer_q.py
[XPU][DeepSeekV4]Add DeepSeek-V4 fuse_index_q SYCL kernel path (
#45991
)
2026-07-21 21:22:34 +08:00
fused_inv_rope_fp8_quant.py
[XPU] FP8 o_proj with fp8_bmm and load-time scale transpose (
#48334
)
2026-07-20 16:32:03 +08:00
fused_mtp_input_rmsnorm.py
[Model Refactoring] Remove torch compile dependency in DSv4 (
#43746
)
2026-05-28 14:26:25 +00:00
save_partial_states.py
[DSv4] Refactor compressor & Fix ROCm compatibility (
#43710
)
2026-05-26 19:56:46 -07:00