 Fadi Arafehandvllm-agent
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556ac15eb9
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[Bugfix] Remove extra args from CPU's compute slot mapping kernel (#61992)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: vllm-agent <claw@inferact.ai>
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2026-10-17 12:11:33 +08:00 |
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92b40f5a14
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[CPU][Perf] refactor paged attention for Arm CPUs (#56045)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-20 12:25:13 +08:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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e3f755b732
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[CPU] Speedup LM Head on Arm CPUs (#55352)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-11 16:21:14 +08:00 |
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Fadi Arafeh
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0e9b50074e
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[chore] clean-up weight prepack for INT8 MoE (#50116)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-07-31 10:15:38 +00:00 |
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10e6b40015
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[CPU][BugFix] Remove redundant kv cache write (#50437)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-07-31 15:28:44 +08:00 |
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Fadi Arafeh
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8122a10536
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[DOC][CPU] remove tcmalloc warning from CPU docs (#50308)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-07-30 06:30:21 +00:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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c314af1abf
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[CPU][Perf] INT8 Fused MoE Kernel for Arm CPUs (#48637)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-07-27 05:53:09 +00:00 |
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Fadi Arafeh
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f1073c050c
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[CPU][BugFix] Multiple fixes to w4a8_int8 CPU MoE path (#46739)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-07-06 05:39:20 +00:00 |
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Fadi Arafeh
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061043eaca
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[CPU][Perf] Accelerate unquantized MoE for AArch64 (#46353)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-06-24 14:14:35 +00:00 |
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Fadi Arafeh
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3da29aa4a5
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[DOC] Add INT8 W4A8 docs and Arm's supported quantization schemes (#34894)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-06-04 16:27:17 +00:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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0b25cf4419
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[CPU][Perf] Enable fused kernels for GDN's gated delta rules (#43534)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-06-02 08:00:48 +00:00 |
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Fadi Arafeh
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be16785998
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[CPU][DOC] Fix installation commands for Arm CPUs (#43115)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-05-19 23:31:15 +00:00 |
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Fadi Arafeh
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b20731d0ae
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[CI][Arm] skip e2e model tests if HF_TOKEN is not set (#41919)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-05-07 11:31:50 +00:00 |
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Fadi ArafehandVadim Gimpelson
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51f22dcfd0
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[Feat][CPU] Enable Gated DeltaNet Attention (Qwen 3.5 / 3.6) (#41025)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
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2026-05-07 12:57:09 +08:00 |
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Fadi Arafeh
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d95d03c719
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[BugFix][CPU] fix error on CPU runner shutdown (#41034)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-04-28 21:08:35 -07:00 |
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Fadi Arafeh
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2aab9acf48
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[CPU][BugFix] Fix inter-node pipeline parallel (#40150)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-04-20 17:21:12 +08:00 |
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Fadi Arafehandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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445b7093fd
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[perf][cpu] Accelerate BF16 GELU with LUT impl on Arm CPUs (#37469)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-15 22:26:17 -07:00 |
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Fadi Arafeh
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71161e8b63
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[cpu][ci] remove soft-fail for Arm CI and add quant model tests (#37691)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-03-26 07:03:31 +00:00 |
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Fadi Arafeh
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34d317dcec
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[CPU][UX][Perf] Enable tcmalloc by default (#37607)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-03-25 20:39:57 +08:00 |
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Fadi Arafeh
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2890aecce5
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[CPU][UX] Do not crash when tcmalloc/libiomp are not ldpreloaded (#37561)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-03-19 16:35:45 +00:00 |
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Fadi ArafehandTyler Michael Smith
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4171ff6dd9
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[CPU][Feat] Enable KleidiAI INT8_W4A8 for all input dtypes (#34890)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
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2026-02-26 05:00:10 +00:00 |
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Fadi Arafeh
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f79d9dce16
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[CPU][BugFix] Fix loading of w8a8int models with bias (#33582)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-02-06 11:59:20 +00:00 |
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Fadi Arafeh
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fd03538bf9
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[CPU][BugFix] Allow w8a8 oneDNN quantized matmul to support 3D inputs (#33727)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-02-05 06:26:09 +00:00 |
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Fadi Arafeh
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1618e25492
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[CPU][Feat] Enable KleidiAI accelerated int4 dynamic quant with BF16 activations on Arm CPUs (#33122)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-31 07:16:22 +00:00 |
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Fadi Arafeh
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17ab54de81
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[CPU Backend][BugFix] Fix failing Darwin pipelines (#33002)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-24 17:02:22 +00:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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10e94c84f6
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[CPU][Feat] Update PyTorch to v2.10 for CPU Backend (#32869)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-01-23 21:13:06 +08:00 |
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Fadi Arafeh
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aac0b817fa
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[CPU Backend][BugFix] Fix failing CPU MoE test (#32876)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-23 12:06:51 +00:00 |
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Fadi Arafeh
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fc56f4a071
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[BugFix] Fix invalid flashinfer_fused_moe_blockscale_fp8 op registration (#32855)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-22 22:27:40 +00:00 |
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Fadi Arafeh
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744ef30484
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[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across NUMA domains on Arm (#32792)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-22 18:55:23 +00:00 |
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Fadi Arafeh
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9103ed1696
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[CPU][BugFix] Disable AOT Compile for CPU (#32037)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-10 23:15:49 -08:00 |
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Fadi Arafeh
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799b5721f6
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[cpu][bench] Add CPU paged attention benchmarks (#31720)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-06 10:57:57 +00:00 |
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Fadi Arafeh
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bb5ac1fe38
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[CPU] Add action to automatically label CPU related PRs (#30678)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-17 04:21:07 +00:00 |
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Fadi Arafeh
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b2191abdca
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[docs][fix] Update Arm CPU vLLM wheel installation docs (#30594)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-15 19:46:25 +00:00 |
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Fadi Arafeh
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f355ad5412
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[CPU][FIX] Fix build failures on Arm CPUs with torch nightly (#30481)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-12 02:09:25 +00:00 |
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Fadi Arafeh
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434ac76a7c
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[cpu][ci] Add CPU Attention Tests for Neon Backend (#30347)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-10 05:37:35 +00:00 |
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Fadi Arafeh
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e130845984
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[CPU][CI] Enable fused MoE tests in Arm CI (#30132)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-09 04:55:39 +00:00 |
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Fadi Arafeh
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78f4bb0ba8
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[DOC] Add Arm to list of compute resouces providers (#29894)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-03 11:36:58 +00:00 |
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Fadi Arafeh
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ecb1952378
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[cpu][fix] Fix Arm CI tests (#29552)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-27 13:09:41 +08:00 |
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Fadi Arafeh
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98caeadd54
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[fix][cpu] Use a SwigluOAI impl which supports interleaved gate-up wei (#29273)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-25 15:11:11 +08:00 |
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Fadi Arafeh
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730bd35378
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[perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON (#29193)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-22 09:04:36 -08:00 |
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Fadi Arafeh
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3168285fca
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[cpu][ci] Add initial set of tests for Arm CPUs (#28657)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-20 02:37:09 +00:00 |
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Fadi Arafeh
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5fb4137c99
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[README] Add Arm CPUs to the list of supported targets (#28290)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-07 15:41:47 +00:00 |
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Fadi Arafeh
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a663f6ae64
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[cpu][perf] Fix low CPU utilization with VLLM_CPU_OMP_THREADS_BIND on AArch64 (#27415)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-10-27 11:14:55 +00:00 |
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Fadi Arafeh
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2080b05099
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[cpu][fix] Fix onednn_mm crash on consecutive matmuls with same M,K,N and different dtype (#27472)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
|
2025-10-24 15:57:48 +00:00 |
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Fadi ArafehandMichael Yang
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163965d183
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[cpu] Dispatch un-quantized linear to oneDNN/ACL by default for AArch64 (#27183)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Michael Yang <Michael.Yang@arm.com>
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2025-10-21 02:02:58 +00:00 |
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Fadi Arafeh
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ab4be40fc5
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[fix][cpu] fix prefill attention in CPU attention backend (#27035)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-10-18 13:30:21 +00:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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9705fba7b7
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[cpu][perf] Accelerate unquantized-linear for AArch64 through oneDNN/ACL and weight prepack (#25948)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2025-10-04 12:16:38 +08:00 |
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Fadi Arafeh
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393de22d2e
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[fix] Update torch version in cpu-build.txt for AArch64/ppc64le and Darwin (#25579)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-09-25 09:39:18 +00:00 |
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