 xiao-llmandAndreas Karatzas
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02bf9c7907
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Fix Quark mxfp4 quantized model loading issue under mtp (#46757)
Signed-off-by: Xiao Yu <xiao.yu.dc@outlook.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-16 14:58:47 -04:00 |
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Wentao Ye
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626c90b2d5
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[Refactor] Move fla to third party (#48500)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-07-16 19:22:36 +01:00 |
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music-dino
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7d56fe2adc
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[ROCm][CI] Avoid HIP init at config time via lazy aiter import in Quark OCP-MX (#48015)
Signed-off-by: Dino Music <Dino.Music@amd.com>
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2026-07-16 16:47:08 +00:00 |
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Zhongdongming Dai
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75bdad40b5
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[Bug][Quantization] Fix humming is_layer_skipped for compressed-tensors "re:" ignore entries (#48507)
Signed-off-by: Zhongdongming Dai <zhongdongmin@nvidia.com>
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2026-07-16 07:47:42 -07:00 |
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Samuel NordmannandCodex
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d08eebad16
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[Perf][MoE] Write FlashInfer combine into final output (#47156)
Signed-off-by: snordmann <snordmann@nvidia.com>
Co-authored-by: Codex <codex@openai.com>
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2026-07-16 17:21:03 +03:00 |
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Artem PerevedentsevandMatthew Bonanni
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7cd1d57b74
|
[CI/Build][Docker] Bump nvidia-cutlass-dsl to 4.6.0 and drop packaging workarounds (#47442)
Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-07-16 13:51:41 +00:00 |
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Thien Tran
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85e296950c
|
BF16x3 router GEMM (#47973)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-07-16 17:04:20 +08:00 |
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6570c9800c
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[Model] Add Inkling model support [1/N] (#48799)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Giancarlo Delfin <32987265+TheEpicDolphin@users.noreply.github.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <mozf@inferact.ai>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-07-15 23:40:07 -07:00 |
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Asaf GardinandMichael Gokhman
|
df8a0900df
|
[BugFix] Don't apply weight in batch-invariant RMSNorm when has_weight=False (#48741)
Signed-off-by: Josephasafg <ajgard7@gmail.com>
Co-authored-by: Michael Gokhman <michael.gokhman@yahoo.com>
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2026-07-16 11:59:03 +08:00 |
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qizixiandClaude Opus 4.8
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2db39c7049
|
[Bugfix][Spec Decode] Fix eagle3 first-layer qkv_proj prefix for quantized drafts (#48068)
Signed-off-by: zixi-qi <zixi@inferact.ai>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-07-16 11:34:41 +08:00 |
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qli88
|
5de1add806
|
[feature]Add int4 quantization support for emulation moe backend (#48451)
Signed-off-by: Qiang Li <qiang.li2@amd.com>
|
2026-07-16 02:00:12 +00:00 |
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0becb7486b
|
[BugFix][MLA] Support kv_cache_dtype_skip_layers for MLA attention (#47309)
Signed-off-by: liuruikang <liuruikang.cs@gmail.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
|
2026-07-16 00:06:11 +00:00 |
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Wentao Ye
|
2dab187f75
|
[Perf] Optimize fused_topk_bias for DSv4, 1.5~2x kernel performance improvement (#47463)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-07-15 23:40:55 +00:00 |
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
4238b011a7
|
[Feature] Migrate moe sp support to non-torch compiled path for GLM5.2 (#47881)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-15 23:33:15 +00:00 |
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Mike G
|
2bd8957627
|
[Bugfix][NVFP4 MoE] Pad gated intermediate to 64 for FlashInfer TRT-LLM shuffle (M%128) (#46880)
Signed-off-by: Mike G <180722391+mikekg@users.noreply.github.com>
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2026-07-15 17:37:15 -04:00 |
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Michael GoinandClaude Fable 5
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ecf4aa5ce2
|
[Bugfix] Fix FlashInfer non-causal draft attention (DFlash/DSpark) on Blackwell (#48167)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-07-15 12:44:01 -07:00 |
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Giuseppe Grossiandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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1d99f0f421
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[ROCm][BugFix] Triton W4A16 handling for GPTQ/AutoGPTQ qzeros layout (#47770)
Signed-off-by: giuseppegrossi <ggrossi@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-15 11:55:47 -05:00 |
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61141ed265
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[Hardware][XPU] Register batch-invariant kernels for XPU (#41934)
Signed-off-by: tzielinski-habana <tomasz.zielinski@intel.com>
Signed-off-by: Tomasz Zielinski <85164140+tzielinski-habana@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Chendi.Xue <chendi.xue@intel.com>
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2026-07-15 11:19:44 -04:00 |
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Gopala-Krishna Char
|
5810e884f1
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[Model] Add RobertaForTokenClassification / XLMRobertaForTokenClassification (#47991)
Signed-off-by: krishy91 <crgkc.r@gmail.com>
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2026-07-15 14:30:33 +00:00 |
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Turner JabbourandClaude
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7aab6e2684
|
[ROCm][Bugfix] Enable the fp32 head_dtype torch.mm fast path on ROCm (#48688)
Signed-off-by: Turner Jabbour <doubleujabbour@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-07-15 08:18:22 +00:00 |
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Giuseppe Grossi
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d119beb1b9
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[ROCm] Add tuned selective_state_update config for AMD MI350 (#48159)
Signed-off-by: Giuseppe Grossi <ggrossi@amd.com>
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2026-07-15 10:18:09 +03:00 |
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e281ac663a
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[Rust Frontend] Integrate MM audio support (#48554)
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
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2026-07-15 15:00:17 +08:00 |
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Charlie FuandAndreas Karatzas
|
adce068118
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[ROCm][CI] fix test_common.py (#48676)
Signed-off-by: charlifu <charlifu@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-15 06:42:06 +00:00 |
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drakoshaandMatthew Bonanni
|
6472131298
|
[Bugfix] Set kv_quant_mode on the generic MLA KV-cache spec (#48379)
Signed-off-by: Mikhail Kostryukov <mike@triptrack.net>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-07-15 03:36:52 +00:00 |
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Jee Jee Li
|
fdf2cf66d3
|
[LoRA][1/N] Integrate flashinfer MoE LoRA for BF16 model (#48632)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-07-15 10:54:00 +08:00 |
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HDCharles
|
9b2be4e9a5
|
[Quant] Enable humming w[2-7]a[4,8] inference with compressed-tensors (#46390)
Signed-off-by: HDCharles <charlesdavidhernandez@gmail.com>
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2026-07-14 20:22:31 -06:00 |
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Andreas Karatzas
|
3ad85e0de4
|
[CI][AMD] Configure MI300 tests for native execution without DinD (#48387)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-15 02:14:16 +00:00 |
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gnovack
|
f7aadae5e5
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add pad-aware reduce path (#48385)
Signed-off-by: gnovack <novackgm@gmail.com>
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2026-07-14 18:05:50 -07:00 |
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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442c421e79
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[Perf] Remove redundant repeat and copy for dsv4, 1.8% E2E TPOT improvement. (#48137)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-15 00:48:10 +00:00 |
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JoanandDakai An
|
0bd6b85a1f
|
[Bugfix] Preserve unloaded non-persistent buffers during layerwise reload (#44371)
Signed-off-by: Joan Velja <joan.velja22@gmail.com>
Co-authored-by: Dakai An <77474977+andakai@users.noreply.github.com>
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2026-07-14 17:46:29 -07:00 |
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vanshbhatia-amdandvanshbhatia-amd
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7ffb98e248
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[ROCm] Retune MI355 selective_state_update float32 config on the unified effective_batch grid (#48373)
Signed-off-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
Co-authored-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
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2026-07-14 18:26:35 +00:00 |
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|
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ca3618bc69
|
[Doc] Sync four function docstrings with their signatures (#45437)
Signed-off-by: Daoyuan Li <94409450+DaoyuanLi2816@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-14 13:10:13 -04:00 |
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Michael Goin
|
b2f7d2560a
|
[Bugfix] Make MLA+SWA check the layer's backend, not the model config (#48520)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-07-14 09:53:34 -07:00 |
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Wentao Ye
|
1ff9429655
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[CI Bug] Fully solve accuracy issue for DSv3.2 + MTP + Sequence Parallel (#48036)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-07-14 10:00:24 -04:00 |
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karthik
|
b6754f536e
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[Model] Enable LoRA support for tower and connector in LlavaNextVideo (#48594)
Signed-off-by: gangula-karthik <gkarthik923@gmail.com>
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2026-07-14 20:09:38 +08:00 |
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adsridharandBartosz Stefaniak
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894ebb27f5
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Add Cosmos3 Edge Reasoner model (#48291)
Signed-off-by: Bartosz Stefaniak <bstefaniak@nvidia.com>
Co-authored-by: Bartosz Stefaniak <bstefaniak@nvidia.com>
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2026-07-14 08:14:50 +00:00 |
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Roberto L. CastroandLucas Wilkinson
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0762f2afeb
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[Perf][Feat] Add generic cuteDSL LL BF16 router (GEMM) (#42562)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Roberto L. Castro <38211239+LopezCastroRoberto@users.noreply.github.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-07-13 23:01:21 -07:00 |
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vanshbhatia-amdandvanshbhatia-amd
|
31be872f55
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[ROCm] Retune MI355 selective_state_update float16 config on the unified effective_batch grid (#48372)
Signed-off-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
Co-authored-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
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2026-07-14 05:16:29 +00:00 |
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nemanjaudovic
|
dcf4072da9
|
[Perf][ROCm] Fix GDN KKT warmup regression on RDNA by avoiding fp32 tl.dot (#45000)
Signed-off-by: Saeid Rostami <srostami@amd.com>
Signed-off-by: nemanjaudovic <nudovic@amd.com>
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2026-07-13 20:48:54 -07:00 |
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Matthias GehreandAndreas Karatzas
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382bbd5144
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[ROCm][Kernel] Add HybridW4A16LinearKernel: Triton prefill + HIP skinny decode (#40977)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-13 20:22:00 -07:00 |
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akii96andPawel Kowalski
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b50ef9c6ed
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[ROCm][MiniMax-M2] Dispatch fused QK-norm + AllReduce via AITER (#44849)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
Co-authored-by: Pawel Kowalski <pawel.kowalski@amd.com>
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2026-07-14 03:10:16 +00:00 |
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Dan Blanaru
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9e289c553c
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up FI fp8 moe topk to 32 (#44462)
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2026-07-14 02:58:16 +00:00 |
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Matthew BonanniandClaude Opus 4.8
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c4f5cd60da
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[1/N] Add dense MHA path for sparse MLA short sequences (#47327)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-07-14 00:29:56 +00:00 |
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Zhenzhong XuandKunshang Ji
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0b0ef8d7eb
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[Quantization][INC][ARK] Support INT2 XPU WOQ Linear (#47521)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-14 08:29:45 +08:00 |
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gnovackandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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21472f32ea
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add pad-aware swiglu limit kernel (#48287)
Signed-off-by: gnovack <novackgm@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-13 16:48:19 -07:00 |
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Snehlata
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7738ef35b8
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[Feat] Add Support for BertForMaskedLM to vLLM (#48463)
Signed-off-by: atalhens <sneh.lata@nutanix.com>
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2026-07-13 20:56:25 +00:00 |
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wenpengw-nvandRoger Wang
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9a21f0d1a3
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[BugFix] Initialize model_config for Qwen3-VL MoE (#44863)
Signed-off-by: wenpengw-nv <wenpengw@nvidia.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
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2026-07-13 13:43:53 -07:00 |
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shanjiaz
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7dc447dda7
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Added sliding window attention support for qwen-eagle3 architecture (#47568)
Signed-off-by: shanjiaz <zsjwpianpian@gmail.com>
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2026-07-13 20:20:44 +00:00 |
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stefankoncarevicandHarry Mellor
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9427c45386
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[ROCm][CI] Transformers: pass only one of input_ids/inputs_embeds (#48258)
Signed-off-by: Stefan Koncarevic <stefan.koncarevic@amd.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-07-13 17:28:50 +00:00 |
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Yan Ma
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c2c9f7c5e2
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remove force channels_last in Idefics3MultiModalProcessor (#48467)
Signed-off-by: Yan Ma <yan.ma@intel.com>
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2026-07-13 14:18:57 +00:00 |
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