 Wentao Ye
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b5433b6f50
|
[Perf] Optimize dsv4 routing using specialized kernel, 2.94% E2E TPOT improvement (#48660)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-07-17 13:35:06 -07:00 |
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aoshen02
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17fdd42100
|
[Bugfix][Attention] Preserve post-load tensors across weight reloads (#48251)
Signed-off-by: aoshen02 <aoshen@inferact.ai>
|
2026-07-17 14:15:26 +08:00 |
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f3e9497e92
|
[Model] Add Inkling LoRA support [4/N] (#48884)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Giancarlo Delfin <32987265+TheEpicDolphin@users.noreply.github.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <mozf@inferact.ai>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-07-17 09:52:15 +08:00 |
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Thien Tran
|
fe784ff22e
|
[M3] Improve indexer for long-context decode (sm100) (#48582)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
|
2026-07-16 18:12:15 -07:00 |
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67f9046e4a
|
[Bugfix] Sparse MLA: enable fp8_ds_mla dense prefill (#48642)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-07-16 22:44:04 +00:00 |
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
f17be06fbe
|
[Perf] Optimize clamp to clamp_ (#48143)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-07-16 18:41:07 -04:00 |
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Jack HuandDouglas Lehr
|
2cab53ddee
|
[Model][Hardware][AMD]: Part 1/2 -> Enable e2e QK Norm + RoPE + KV Cache runtime fusion for Qwen3-30B-A3B on ROCM_AITER_FA, and ROCM_AITER_UNIFIED_ATTN (#42749)
Signed-off-by: Jack Hu <Jack.Hu@amd.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
|
2026-07-16 17:39:04 -05:00 |
|
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Michael Goin
|
c95c663049
|
[Quant] Add nvfp4_per_token online MoE quantization (#48538)
Signed-off-by: mgoin <mgoin64@gmail.com>
|
2026-07-16 14:25:27 -07:00 |
|
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HDCharles
|
ab3c1aedf3
|
[Bugfix] Fix activation quantization dispatch for WNA4Int/WNA8Int (#48785)
Signed-off-by: HDCharles <charlesdavidhernandez@gmail.com>
|
2026-07-16 17:13:02 -04:00 |
|
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xiao-llmandAndreas Karatzas
|
02bf9c7907
|
Fix Quark mxfp4 quantized model loading issue under mtp (#46757)
Signed-off-by: Xiao Yu <xiao.yu.dc@outlook.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
|
2026-07-16 14:58:47 -04:00 |
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Wentao Ye
|
626c90b2d5
|
[Refactor] Move fla to third party (#48500)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2026-07-16 19:22:36 +01:00 |
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music-dino
|
7d56fe2adc
|
[ROCm][CI] Avoid HIP init at config time via lazy aiter import in Quark OCP-MX (#48015)
Signed-off-by: Dino Music <Dino.Music@amd.com>
|
2026-07-16 16:47:08 +00:00 |
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Zhongdongming Dai
|
75bdad40b5
|
[Bug][Quantization] Fix humming is_layer_skipped for compressed-tensors "re:" ignore entries (#48507)
Signed-off-by: Zhongdongming Dai <zhongdongmin@nvidia.com>
|
2026-07-16 07:47:42 -07:00 |
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Samuel NordmannandCodex
|
d08eebad16
|
[Perf][MoE] Write FlashInfer combine into final output (#47156)
Signed-off-by: snordmann <snordmann@nvidia.com>
Co-authored-by: Codex <codex@openai.com>
|
2026-07-16 17:21:03 +03:00 |
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Artem PerevedentsevandMatthew Bonanni
|
7cd1d57b74
|
[CI/Build][Docker] Bump nvidia-cutlass-dsl to 4.6.0 and drop packaging workarounds (#47442)
Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
|
2026-07-16 13:51:41 +00:00 |
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Thien Tran
|
85e296950c
|
BF16x3 router GEMM (#47973)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
|
2026-07-16 17:04:20 +08:00 |
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Asaf GardinandMichael Gokhman
|
df8a0900df
|
[BugFix] Don't apply weight in batch-invariant RMSNorm when has_weight=False (#48741)
Signed-off-by: Josephasafg <ajgard7@gmail.com>
Co-authored-by: Michael Gokhman <michael.gokhman@yahoo.com>
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2026-07-16 11:59:03 +08:00 |
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qli88
|
5de1add806
|
[feature]Add int4 quantization support for emulation moe backend (#48451)
Signed-off-by: Qiang Li <qiang.li2@amd.com>
|
2026-07-16 02:00:12 +00:00 |
|
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0becb7486b
|
[BugFix][MLA] Support kv_cache_dtype_skip_layers for MLA attention (#47309)
Signed-off-by: liuruikang <liuruikang.cs@gmail.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
|
2026-07-16 00:06:11 +00:00 |
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Wentao Ye
|
2dab187f75
|
[Perf] Optimize fused_topk_bias for DSv4, 1.5~2x kernel performance improvement (#47463)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2026-07-15 23:40:55 +00:00 |
|
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
4238b011a7
|
[Feature] Migrate moe sp support to non-torch compiled path for GLM5.2 (#47881)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-15 23:33:15 +00:00 |
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Mike G
|
2bd8957627
|
[Bugfix][NVFP4 MoE] Pad gated intermediate to 64 for FlashInfer TRT-LLM shuffle (M%128) (#46880)
Signed-off-by: Mike G <180722391+mikekg@users.noreply.github.com>
|
2026-07-15 17:37:15 -04:00 |
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61141ed265
|
[Hardware][XPU] Register batch-invariant kernels for XPU (#41934)
Signed-off-by: tzielinski-habana <tomasz.zielinski@intel.com>
Signed-off-by: Tomasz Zielinski <85164140+tzielinski-habana@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Chendi.Xue <chendi.xue@intel.com>
|
2026-07-15 11:19:44 -04:00 |
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Turner JabbourandClaude
|
7aab6e2684
|
[ROCm][Bugfix] Enable the fp32 head_dtype torch.mm fast path on ROCm (#48688)
Signed-off-by: Turner Jabbour <doubleujabbour@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-07-15 08:18:22 +00:00 |
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Giuseppe Grossi
|
d119beb1b9
|
[ROCm] Add tuned selective_state_update config for AMD MI350 (#48159)
Signed-off-by: Giuseppe Grossi <ggrossi@amd.com>
|
2026-07-15 10:18:09 +03:00 |
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drakoshaandMatthew Bonanni
|
6472131298
|
[Bugfix] Set kv_quant_mode on the generic MLA KV-cache spec (#48379)
Signed-off-by: Mikhail Kostryukov <mike@triptrack.net>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
|
2026-07-15 03:36:52 +00:00 |
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Jee Jee Li
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fdf2cf66d3
|
[LoRA][1/N] Integrate flashinfer MoE LoRA for BF16 model (#48632)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
|
2026-07-15 10:54:00 +08:00 |
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HDCharles
|
9b2be4e9a5
|
[Quant] Enable humming w[2-7]a[4,8] inference with compressed-tensors (#46390)
Signed-off-by: HDCharles <charlesdavidhernandez@gmail.com>
|
2026-07-14 20:22:31 -06:00 |
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gnovack
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f7aadae5e5
|
add pad-aware reduce path (#48385)
Signed-off-by: gnovack <novackgm@gmail.com>
|
2026-07-14 18:05:50 -07:00 |
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vanshbhatia-amdandvanshbhatia-amd
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7ffb98e248
|
[ROCm] Retune MI355 selective_state_update float32 config on the unified effective_batch grid (#48373)
Signed-off-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
Co-authored-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
|
2026-07-14 18:26:35 +00:00 |
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ca3618bc69
|
[Doc] Sync four function docstrings with their signatures (#45437)
Signed-off-by: Daoyuan Li <94409450+DaoyuanLi2816@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-14 13:10:13 -04:00 |
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Michael Goin
|
b2f7d2560a
|
[Bugfix] Make MLA+SWA check the layer's backend, not the model config (#48520)
Signed-off-by: mgoin <mgoin64@gmail.com>
|
2026-07-14 09:53:34 -07:00 |
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Roberto L. CastroandLucas Wilkinson
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0762f2afeb
|
[Perf][Feat] Add generic cuteDSL LL BF16 router (GEMM) (#42562)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Roberto L. Castro <38211239+LopezCastroRoberto@users.noreply.github.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-07-13 23:01:21 -07:00 |
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vanshbhatia-amdandvanshbhatia-amd
|
31be872f55
|
[ROCm] Retune MI355 selective_state_update float16 config on the unified effective_batch grid (#48372)
Signed-off-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
Co-authored-by: vanshbhatia-amd <210711135+vanshbhatia-amd@users.noreply.github.com>
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2026-07-14 05:16:29 +00:00 |
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nemanjaudovic
|
dcf4072da9
|
[Perf][ROCm] Fix GDN KKT warmup regression on RDNA by avoiding fp32 tl.dot (#45000)
Signed-off-by: Saeid Rostami <srostami@amd.com>
Signed-off-by: nemanjaudovic <nudovic@amd.com>
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2026-07-13 20:48:54 -07:00 |
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akii96andPawel Kowalski
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b50ef9c6ed
|
[ROCm][MiniMax-M2] Dispatch fused QK-norm + AllReduce via AITER (#44849)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
Co-authored-by: Pawel Kowalski <pawel.kowalski@amd.com>
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2026-07-14 03:10:16 +00:00 |
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Dan Blanaru
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9e289c553c
|
up FI fp8 moe topk to 32 (#44462)
|
2026-07-14 02:58:16 +00:00 |
|
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Matthew BonanniandClaude Opus 4.8
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c4f5cd60da
|
[1/N] Add dense MHA path for sparse MLA short sequences (#47327)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-07-14 00:29:56 +00:00 |
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Zhenzhong XuandKunshang Ji
|
0b0ef8d7eb
|
[Quantization][INC][ARK] Support INT2 XPU WOQ Linear (#47521)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-14 08:29:45 +08:00 |
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gnovackandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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21472f32ea
|
add pad-aware swiglu limit kernel (#48287)
Signed-off-by: gnovack <novackgm@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-13 16:48:19 -07:00 |
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107a03ba63
|
[Core] Support fp32 lm_head for generation models via head_dtype (RFC #48305 §3.6) (#48390)
Signed-off-by: Karthik Kothuri <karthikkothuri2009@gmail.com>
Signed-off-by: wang.yuqi <yuqi.wang@daocloud.io>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: wang.yuqi <yuqi.wang@daocloud.io>
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2026-07-13 16:43:34 +08:00 |
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bea70c7cfc
|
[Attention] Make sliding-window support an explicit backend capability (#48011)
Signed-off-by: NickLucche <nicolo.lucchesi@mistral.ai>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-13 01:07:56 -07:00 |
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05fa8183a6
|
[CPU][Spec Decode] Support DFlash speculative decoding for GDN models on CPU (#46090)
Signed-off-by: guybd <guy.boudoukh@intel.com>
Signed-off-by: Guy Boudoukh <guy.boudoukh@intel.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-07-13 04:16:18 +00:00 |
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zzt
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2595d5cebc
|
[Model] Optimize Qwen3.5 on H20 (#48350)
Signed-off-by: zzt <zengzetang.zzt@antgroup.com>
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2026-07-13 03:30:48 +00:00 |
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Tanish MalekarandClaude Sonnet 4.6
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e26264f3ef
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[Kernel] Implement CUDA kernel for ReLUSquaredActivation (relu^2) (#39058)
Signed-off-by: Tanish Malekar <tanishmalekar32@gmail.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-07-12 19:18:03 -07:00 |
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Canlin Guoandyewentao256
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a02984ed47
|
[Perf][Qwen] Replace MOE all-reduce with reduce-scatter (#47006)
Signed-off-by: gcanlin <canlinguosdu@gmail.com>
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: yewentao256 <zhyanwentao@126.com>
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2026-07-12 06:14:49 +00:00 |
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19069bcbd5
|
FP32 router GEMV optimization (#48335)
Signed-off-by: peiyuanz <peiyuanz@inferact.ai>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: peiyuanz <peiyuanz@inferact.ai>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: zhouzhou <zhouzhou@zhouzhoudeMacBook-Pro.local>
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2026-07-11 13:07:48 +00:00 |
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Qiming ZhangandKunshang Ji
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0b6636cbcb
|
[XPU]remove is_xxx from moe class and bump up kernels (#48079)
Signed-off-by: mayuyuace <qiming1.zhang@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-11 09:27:13 +00:00 |
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Jimmy Lee
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092387963c
|
[BugFix] weights processing peak memory reduction for nvfp4 MoE layers (#46276)
Signed-off-by: Jimmy Lee <hirejimmylee@gmail.com>
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2026-07-11 02:05:35 +00:00 |
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Joe Rowellandmgoin
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1bf3997eae
|
[Quantization] Bound peak memory when repacking FP4 MoE weights for Marlin (#47851)
Signed-off-by: Joe Rowell <joerowell4@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-07-10 19:46:13 -06:00 |
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